信元總線介面 的英文怎麼說
中文拼音 [xìnyuánzǒngxiànjièmiàn]
信元總線介面
英文
cell bus interface-
Fieldbus is a kind of communication network which is a whole digitial communication multi _ embranchment data bus between intelligential field device and auto _ system. control system based on pcs ( fieldbus control system ) is a new kind of system which connect field control unit, field monitor unit, operation unit, communication interface uint with databus. lt integrates computer technology, communication technology and process cnotrol technology to adjust to demand of high standard productive control and enterprise management. lt developments and follows the advantage of traditional instrument control system and computer central control system and make up for their disadvantage so that it is applied in different industrial cnotrol area
現場總線是連接智能現場設備和自動化系統的數字式、雙向傳輸、多分支的通信網路。它是一種能支持雙向、多節點、總線式的全數字通信網路。基於現場總線技術的控制系統是一種新型的控制系統，它採用總線方式將現場控制單元、現場監視單元、操作站、通信介面單元連接起來，綜合了計算機技術、通信技術和過程式控制制技術，以適應現代高水平生產控制與企業管理的需要。The development of fieldbus technology made lonworks field bus outstanding in all kinds of fieldbus. this paper simply introduces some kinds of common using fieldbus and the important position and influence of lonworks fieldbus in all kinds of fieldbus, carefully describes the technology core of lonworks technology, puts great emphasis on the introduction of the development and design of public security node of intelligent district which adopts computer, communication and control technology, carefully designs the interfaces of hardware circuits. the public security node of intelligent adopts 8031 single chip as its main processor to complete the application program of user, which mainly collects, process and control all kinds of field signal, and neuron chip 3150 as its slave processor to communicate with other nodes on field network, which works under parrel slave a mode
現場總線技術的發展使得lonworks技術脫穎而出，本文簡要介紹了常用的幾種現場總線的概況以及lonworks技術在現場總線技術中的地位和影響，對lonworks技術的技術核心：神經元晶元、 lontalk協議、 lonworks收發器、 lonbuilder及nodebuilder進行詳盡的描述；重點介紹了集先進的計算機技術、通信技術、控制技術為一體的智能小區安防節點的開發與研製，對節點硬體電路的各種介面進行了詳盡的設計。本文設計的智能小區安防節點採用單片機8031作為主處理器來完成用戶的應用程序，主要負責對各種現場信號進行採集、處理及控制，工作在并行從a方式下的神經元晶元mc3150作為從處理器，主要完成與現場網路上的各節點及中心控制室之間的通信工作。This paper first begin with the connotation of virtual instrument technology, study and discuss the criterion and the working theory of usb deeply. on the principle of usb1. 1criterion, using usb interface chip usbn9604 and low consumption mirochip c8051f231, we designed the available interface of usb bus and its controlling software, turn the communicating function based usb bus between computer and testing device. second based on the developed interface of usb bus, using microchip pic16c62 and a mount of relays, we designed the multiswitching scanner and its controlling software to complete the funtion of accesses swithing in testing system. third calling the api function inside the windows using vb programming language, communicat with the impelling program of selected hid, achieve the function of testing instrument with usb interface, complete the development of upside software faced testing. at last, based on the deep studying of pcb testing method, used the developed multiswithing scanner and software faced testing, combinated with necessary testing instrument, we constructed the pcb testing system and analized the testing result simply
論文首先從虛擬儀器的技術內涵出發，深入研究和討論了通用串列總線usb規范及工作原理，並依據usb1 . 1規范，採用usb介面晶元usbn9604和低功耗微處理器c8051f231設計開發了通用的usb總線介面及其控制固件，實現了通用計算機與測試設備之間基於usb總線的通信功能；其次，在所開發的usb總線介面的基礎上，使用微處理器pic16c62和多路繼電器開關，設計開發出實現測試系統中測試通道切換功能的多路通道掃描器及其控制固件；再次，採用vb語言編程，調用windows內部api函數，與選定hid類驅動程序進行通信，實現usb總線介面測試儀器功能，完成面向測試的上層軟體開發；最後，在深入研究印刷電路板測試方法的基礎上，利用已開發的多路通道掃描器和面向測試軟體，結合必要測試儀器組建印刷電路板測試系統，並對測試結果進行了簡要的誤差分析。Distributed control system based fieldbus is a new kind of control system, it connects ufch, ufmh, uops, ulfs by databus mode. it integrates computer technology, communication technology and process control technology, adopts multi - layers frame to adjust to demand of high standard productive control and management
基於現場總線技術的集散控制系統是一種新型的控制系統，它是採用總線方式將現場控制單元、現場監視單元、操作站、通信介面單元連接起來，綜合了計算機技術、通信技術和過程式控制制技術，採用了多層次分級的結構形式，以適應現代高水平生產控制與管理的需要。Business telecommunications - multiple 64 kbit s digital unrestricted leased lines with octet integrity presented at a stuctured 2048 kbit s interface at either or both ends - connection characteristics and network interface presentation
商業電信.在結構的2048kbit s介面一端或兩端帶有八位位元組總展示的多重64kbit s數字非限制出租線.連接特性和網路介面展示Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method
在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future
第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpgaPart two : design the schematic of the intelligent communication card ; to apply protel99 software to design sch and pcb charts, then send them to the factory ; to debug on the hardware and test on can bus chip ; to program assemble language control and can bus communication software of the intelligent communication card and debug on the super ice16 simulator ; to utilize the super ice 16 simulator to debug the control programs of the communication card online ; link to control card and debug the can bus communication program online ; to debug the system on eprom
第二部分：設計can總線智能通信卡的硬體電路，應用protel99設計軟體繪制原理圖及印刷電路板圖，並送廠製作板卡電路板:智能通信卡硬體製作和can總線晶元調試;編寫通信卡控制及can總線通信匯編語言程序並編譯;在superice16模擬器上在線模擬調試控製程序;連接系統控制卡，模擬調試can總線通信程序;程序燒入eprom晶元，進行系統eprom模擬調試;介面系統驅動程序及測試軟體調試。Although there have been many application instances in the field of input / output device technology, we need an specific project and technology route aimed at an given application. in this thesis, we combine the introduction and analysis of relative technology to describe the accomplishment of a coordinate collecting device which is based on incremental rotary encoder. this device is an specific device applied to collect the corrdinate displacement of ground image ’ s three - dimensional model created by full digital photogrammetric station. cpld chip and vhdl are applied in this device to carry out the following work : phase control of the electrical pulse created by incremental rotary encoder, counting the number of electrical pulse, controling the state of signal processing circuit, exchanging data between this circuit and pci control
本文結合相關技術的介紹和分析，描述了一個基於增量式旋轉編碼器的坐標參量採集介面卡的實現，此介面卡是一種用於採集全數字攝影測量系統地面影像模型坐標位移量的專用設備，該設備採用cpld器件和vhdl語言實現增量式旋轉編碼器的脈沖信號鑒相和計數、信號處理部分的狀態控制以及和pci總線晶元ch365之間的數據交換和通信功能，同時該設備的驅動程序基於wdm模式，並且配置有結構良好的動態鏈接庫程序作為系統軟體和驅動程序之間的數據和控制交互中間介面，能夠方便地運行在windows98 / 2000 / xp操作系統平臺上，具有實時性強、工作穩定、通用性較好和性價比高等特點。According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system
針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。The tramsission rate exceed to the range of isa bus, moreovcr the pci bus can be competent for the rate request. the card makes use of the total line in pcicontroller, the slice of fifo, fpga and super - speed a data correspondence chip, which can solve the transmission stream and total line in pci connecting problem. and realizes the mpeg - 2 deliver to flow with establish outside delivers
此速率超過了isa總線所能支持的傳送速率，而pci總線能夠勝任這一要求，由此確定節目傳輸流發送卡採用pci總線。此卡利用pci總線控制器、 fifo晶元、 fpga晶元、高速串列數據通信發送晶元，解決傳輸流與pci總線之間的介面問題，實現了mpeg - 2傳輸流與外設的高速數據傳輸。Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function
本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。On - line monitoring of hvcb is the precondition of predicting maintenance, is the key element of reliable run, and is the important supplement to the traditional off - line preventive maintenance in fact, the faults are made by hvcb, no matter in number or in times, is over 60 % of total faults so it has determinative importance for improving the reliability of power supply and this can greatly decrease the capital waste used by - dating overhaul in this paper, the inspecting way of hvcb mechanism characteristic is discussed the concept of sub - circuit protector is presented, the scheme that we offered has been combined with sub - circuit integrality monitoring theory, to ensure that it has the two functions as a whole according the shut - off times at rated short circuit given by hvcb manufacturer, the electricity longevity loss can be calculated in each operation, and the remained longevity can be forecast too an indirect way for calculating main touch ' s temperature by using breaker shell temperature, air circumference temperature and breaker ' s heat resistance is improved in this paper, and main touch resistance can be calculated if providing the load current msp430, a new single chip microcomputer made by ti company, is engaged to develop the hardware system of the on - line monitoring device, and special problem brought by the lower supply voltage range of this chip is considered fully
高壓斷路器所造成的事故無論是在次數，還是在事故所造成的停電時間上都占據總量60以上。因此，及時了解斷路器的工作狀態對提高供電可靠性有決定性意義；並可以大大減少盲目定期檢修帶來的資金浪費。本文論述了斷路器機械特性參數監測方法；提出了二次迴路保護器的概念，並將跳、合閘線圈完整性監視和二次迴路保護結合起來，給出具有完整性監視功能的二次迴路保護器實現方案；根據斷路器生產廠家提供的斷路器額定短路電流分斷次數，計算每次分閘對應的觸頭電壽命損耗，預測觸頭電壽命；提出根據斷路器殼體溫度和斷路器周圍空氣溫度結合斷路器熱阻來計算斷路器主觸頭穩態溫升的方法，並根據此時的負荷電流間接計算主觸頭迴路的電阻；在硬體電路設計上，採用美國ti公司最新推出的一種功能強大的單片機msp430 ，並充分考慮該晶元的適用電壓范圍給設計帶來的特殊問題；在通信模塊的設計中，解決了不同工作電壓晶元之間的介面問題，並給出了直接聯接的接線方案。It has been playing an important role in equipping all kinds of arms and services for campaigns, tactical exercises and emergent actions etc. based on the detailed analysis of the exchange ' s architecture and implementing, this thesis points out some disadvantages of the device, such as too many absolute components, not very high enough reliability and security, very large size and weight, operating and maintaining difficultly. considering low power requirement and man - machine interface optimizing design at the same time, the thesis come up with an integrated design scheme to the previous device based on " mcu + cpld / fpga architecture " : ( 1 ) signal frequency dividing, timing frequency producing, 20 customers " led states controlling are implemented in cpld ; ( 2 ) decoding, latching data and controlling signals are implemented in cpld by bus interface between mcu and cpld ; ( 3 ) chip selecting principles and mcu idle mode design are completed under the consideration of low power requirement ; ( 4 ) operation by chinese lcd menus is adopted in the man - machine interface
本項目以該交換機為研究對象，在詳細分析原設備的系統結構和功能實現方式的基礎上，指出該機型在使用過程中存在技術相對陳舊、分立元件過多、可靠性和保密性不夠、體積大、重量大、維修困難等問題，同時結合系統的低功耗需求和優化人機介面設計，本文提出基於「單片機+ cpld fpga體系結構」的集成化設計方案：在cpld中實現信號音分頻和計時頻率生成電路、 20路用戶led狀態控制電路； cpld與單片機以總線介面方式實現譯碼、數據和控制信號鎖存功能的vhdl設計；基於低功耗設計的器件選型方案和單片機待機模式設計；人機介面的lcd菜單操作方式。The hardware circuit boards are produced by a laser photoplotter according to the gerber files gererated from the schematic ( sch ) documents and the printed circuit board ( pcb ) documents. the cplds, programmed with the verilog hardware description language ( verilog hdl ), were completed after four steps : design, simulation, synthesis and fit. the software is developed with c language using direct i / o to communicate with the device through the isa bus computer interface
其硬體電路由專業軟體設計出原理圖sch和印刷電路圖pcb生成，再gerber文件，然後光繪而成， cpld晶元編程（採用硬體描述語言veriloghdl ）經過設計、模擬、裝配、下載完成，高級軟體編程採用c語言i / o方式利用isa總線介面與外設進行通信。Fifo data channel of pci interface chip s5933 and approach of realizing pci bus master dma through the fifo is introduced in detail. the reason for choosing s5933 ' s fifo to transfer data at high speed is clarified. secondly, the design process of hardware is introduced
文中首先介紹了pci總線的協議，討論了pci介面的實現途徑，並詳細介紹了pci介面晶元s5933的fifo通道及其總線主控dma方式的實現方法，闡明了選用s5933的fifo通道進行高速數據通信的原因。Firstly, pci local bus technology is generally introduced, including the major features of pci local bus, the concepts of basic signals, pci local bus operation and configuration space of pci device in the thesis. subsequently, the correlative technology and choice of the design of the system are summarized. the chip ( ep1k30qc208 - 3 ) in this design and mode of data transmission are introduced
本論文在硬體方面，首先，介紹了pci總線的基本操作與一些基本概念，包括pci總線信號定義和pci總線的讀寫操作以及仲裁操作;接著，介紹了pci總線介面設計和數據傳輸方式以及設計所用altera公司的acex1k系列中的ep1k30qc208 - 3晶元;最後，完成了使用低廉的晶元實現pci總線介面設計。Also features and usage of amcc s5920 used as pci bus controller in the paper are given. then relevant technologies about dsp are detailed
文中第二章詳細闡述了信號採集處理卡的硬體設計過程，包括pci總線介面的實現、 dsp晶元的選擇等等。In the multi - module mode both trig signal and reference clock are used for synchronization. the functional module supports dma with the dsp, which frees the dsp ' s core processor and entitles the real - time digital signal processing
在數據傳輸方面無論是通過外部總線介面還是數據鏈路介面，功能模塊與dsp之間都支持dma方式，解放了母板處理器的核心運算單元，使實時信號處理成為可能。This image grab card uses saa7111 to translate the analogue signal to digital image data. after buffering in an fifo ram the data are read into computer by a universal pci interface chip, pci9052. finally the images are displayed on screen
該視頻採集卡以fpga為邏輯控制中心，採用saa7111將四路視頻信號分別轉換為數字圖像數據，經fifo緩存后，由pci總線介面晶元pci9052將數據送入計算機，最後通過應用程序將圖像顯示出來。分享友人