字數分鐘 的英文怎麼說

中文拼音 [zìshǔfēnzhōng]
字數分鐘 英文
words per minute
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 分 : 分Ⅰ名詞1. （成分） component 2. （職責和權利的限度） what is within one's duty or rights Ⅱ同 「份」Ⅲ動詞[書面語] （料想） judge
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 字數 : word number
  1. Dials for electric clocks ; number dials

    電子鐘鐘面.第4部分:數字鐘面
  2. Lemaire then took just over a minute to identify two quadrillion, 397 trillion, 207 billion, 667 million, 966 thousand, 701 as the 13th root

    而勒麥爾只用了一分多鐘的時間就算出了這一長串數字的13次方根，答案是2397207667966701 。
  3. Automatic test pattern generation for multi - clock digital system based on s amp; amp; cct

    基於安全充分捕獲技術的多時鐘數字系統測試矢量生成
  4. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  5. Thirdly, the paper discusses the driver of the peripheral equipment, how to port the uc / os - n and uclinux, h. 323 protocol and the application of the system in the digital speech classroom. also some software and hardware measure are adopted to enhance the system stability. at last, the shortcoming and the something to be improved are given. dsp can be used to realize real - time speech coding algorithm, and after porting ( ac / os - n, arm can manage the keyboard, the lcd and the ethernet peripheral etc. then the embedded network system with specific purpose can be used in others fields, such as pda, set of top, web tv, ect

    在實際設計實現中，為提高系統軟、硬體整體穩定性和可靠性，使用了以下幾種方法： （ 1 ）低電壓復位、抗電源抖動能力、增加時鐘監測電路、抗電磁干擾能力、散熱等技術； （ 2 ）多層pcb設計，線路板結構緊湊，電源部分採用數字5v 、 3 . 3v 、 3v 、 1 . 8v和模擬5v多電源供電； （ 3 ）選用表面貼和bga封裝的器件； （ 4 ）按照軟體工程的要求進行系統分析，規劃系統框圖、流程分析、模塊劃分，減小了不同模塊的相關性，從而最大限度避免了錯誤的發生。
  6. The field of video signal processing is now undergoing a digital reform. the digital processing technique is clearly expatiated in this paper, such as a / d convert, anti - alias filter, clamp control, gain control, pll, synchronization circuit, color decoder, comb filters

    本文詳細敘述了視頻圖像的數字處理方法，重點介紹了視頻信號數字化技術、抗混疊濾波器、箝位、增益控制、鎖相技術、同步時鐘產生、電視信號亮色分離、彩色解碼等技術，這些關鍵技術為視頻信號的數字化處理提供了重要的基礎。
  7. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  8. Bits supplies the synchronous timing signal to these equipments inside the telecommunicationt building, such as dps, atm, no. 7, dxc, tm & adm in sdh, don and in etc. the related techniques are involved in the content of synchronization ne twork, timing distribution, the timing signal transportations x impairments etc. the second chapter tells the structure and the function of the building integrated timing system. the third chapter summarizes the digital synchronization network techniques, which emphasizes the basic concept of synchronization networks analyzes the necessity of building the synchronization network and introduces all kinds of synchronization methods. the fourth chapter represents the transportation of the synchronization signal

    本文第二章講述了通信樓綜合定時系統的構成及作用：第三章概述了數字同步網技術，著重描述了同步網的基本概念，分析了建立同步網的必要性，講述了各種同步方法；第四章闡述了同步定時信號的傳輸；第五章介紹了bits設備所支持的同步狀態消息；第六章、第七章為本文的重點，通過對時鐘信號建立數學模型，從理論上分析時鐘內部噪聲和相位瞬變產生時鐘定時信號損傷的原理，企圖尋找到更好地控制頻率漂移的方法。
  9. W. p. m. words per minute

    電傳每分鐘字數
  10. Words per minute

    每分鐘字數
  11. This technology allows us to visualize something in seconds and minutes that otherwise might take pages of text and columns of figures to understand

    這項技術使我們可以在幾秒鐘或幾分鐘之內顯示一件事情，如果沒有這項技術，這些事情要用很多的文字、圖表和數字表述才能被人理解。
  12. Most everyone seems to know the name of the forest picnic area atop santa anita canyon drive, but you may not be aware of all the subtle but significant improvements there as described and demonstrated in this 2 - minute video

    多數大家似乎知道森林野餐區的名字在聖塔阿尼塔峽谷驅動上面，但您不可以意識到所有微妙而是重大改善那裡如所描述和展示在這2分鐘錄影里。
  13. One afternoon i had then been three weeks at lowood, as i was sitting with a slate in my hand, puzzling over a sum in long division, my eyes, raised in abstraction to the window, caught sight of a figure just passing : i recognised almost instinctively that gaunt outline ; and when, two minutes after, all the school, teachers included, rose en masse, it was not necessary for me to look up in order to ascertain whose entrance they thus greeted

    一天下午那時我到羅沃德已經三星期了，我手裡拿了塊寫字板坐著，正為長除法中的一個總數發窘，眼睛獃獃地望著窗外，看到有一個人影閃過。我幾乎本能地認出了這瘦瘦的輪廓。因此兩分鐘后，整個學校的人，包括教師在內都全體起立時，我沒有必要抬起頭來后過究竟，便知道他們在迎接誰進屋了。
  14. Digital clock timer segment timer

    數字時鐘定時器分段定時器
  15. In the time - domain, based on the principle of random sampling of dso. two way ( " time amplifing in dual slope integral " and " time - voltage convert " ) are implemented to measure the time between the system triger and writing clock. thus random sampling interpolate can be done to measure repeated signal in high frequency with the a / d convert and controller which frequency are lower

    在時域，根據數字示波器隨機取樣原理，用兩種方法（雙斜率積分時間放大測量方法和時間? ?電壓轉換測量方法）測量數字示波器系統觸發和采樣寫時鐘間時間間隔，用低速a / d轉換器及控制器進行模?數轉換和控制，以此進行隨機取樣內插，從而實現了對高頻率重復信號的測量。
  16. The media enhancement extension to mips - i compatible isa is physically realized in the processor core, and improves media processing performance effectively ( 2 - 4x ) with negligible additional hardware cost ( 2. 7 % ). a finite state machine ( fsm ) based centralized control scheme is presented in this paper to supervise the cpu pipeline activity

    在系統晶元中媒體數字信號處理器核的設計中，在具體分析cpu流水線競爭和處理器異常的基礎上，本文提出並實現了一種基於有限狀態機的流水線運行控制方案，並從提高鐘頻和降低cpi值兩個方面優化處理器性能。
  17. If the script is executed after 30 minutes of the initial infection, and the number of seconds equals five, it attempts to delete all files from the system, shows a message box and shuts down windows

    如果這個腳本程式執行了30分鐘后，秒數是等於5 。它便會嘗試刪除windows系統目錄內的所有檔案，然後顯一個文字方塊和關閉電腦。
  18. To achieve this the sampling clock should be isolated as much as possible from the noise present in the digital parts of the system

    為此，時鐘信號應該盡可能地與電路中強噪聲的部分隔離開，例如數字電路。
  19. Compact and modularly built with a footprint of just 0. 8m2, they are the world s first a0 machines that can be stacked or separated. the plotter adopts a universal design allowing easy accessibility for engineering and manufacturing cad printing, copying and scanning. with smooth precision, excellent resolution and remarkable performance, docuwide 6050 6030 optimize office efficiency and maximize bottom line, making them the natural choice for today s engineering input output environments

    該數碼多功能一體機docuwide 6050 6030系列具有每分鐘5張a0的速度600 1200dpi質量的輸出解析度自動背景抑制等功能，而且它採用了高性能的控制器，具備高的可靠性和穩定性，實現了快速的數據處理和高性能的圖紙列印輸出它不僅具備復印列印掃描功能，而且能夠實現圖紙及技術資料的電子化管理，充分滿足圖紙的使用部門或管理部門對圖紙和技術文件數字化網路化的需求，實現工程文件和技術文件的統一管理。
  20. Chased hands shaped in the style of louis xv, crafted from pure gold deploy their beauty on the enamelled tripartite dial

    部分組成的白色搪瓷表盤上充分展示了它的美麗。弧形的阿拉伯數字被圈在紅色的分鐘計內。
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