尋址操作 的英文怎麼說
中文拼音 [xúnzhǐcāozuò]
尋址操作
英文
addre ing operation-
The instruction format indicates that there can be as many as 2 [ 4 ] = 16 different opcodes, and up to 2 [ 12 ] = 4, 096 ( 4k ) words of memory can be directly addressed
這樣的指令格式說明有16 （ 2的4次方）種不同的操作碼和4096 （ 2的12次方）字大小的內存存儲空間能被直接尋址。Several technologies researched and applied in research of the thesis which includes the technique of electric energy measurement, the remote and automatic reading meter, gprs, embedded system and remote update application in terminal. the system has advantage of execution efficiency, software cubage, and response speed and communication expense
終端系統的設計基於嵌入式系統，充分利用了嵌入式操作系統的多任務能力、模塊可裁剪能力，嵌入式處理器的速度快、尋址能力強和資源豐富以及gprs網路永遠在線、通信費用低廉等優勢，在執行效率、代碼體積、通信處理能力和經濟效益上都有著強大的優勢。The paper elaborates risc technology characteristic and 5 - stage pipeline architecture and function of the 64 - bit risc cpu, and dwells on 64 - bit vega cpu characteristic, and details the eda technology and the main flow of asic design, and elaborates the operation and exception process of the vega cpu and virtual instruction address " architecture and generation, and details cache architecture and mmu. the master dissertation dwells on virtual address translating into physical address, instruction cache finding address and instruction fetching, too
詳細的闡述了64位vegacpu的特點，闡述了eda技術和asic設計的主要流程，闡述了vegacpu流水線結構、流水線操作、流水線暫停和異常處理，虛擬指令地址的結構和產生， mmu結構，包括指令tlb結構和虛擬指令地址向物理指令地址的生成流程， cache結構，尋址原理和指令的寫策略，指令高速緩存的尋址原理和結構，以及指令的獲取流程。After analyzing and comparing different partition rules, md32 pipeline architecture is finally defined, which meets the required instruction function, frequency and timing spec of md32. a complete set of creative design method for risc / dsp md32 micro - architecture is presented, such as parallel design, internal pipeline, central control, etc. thanks to the adoption of these design methodology, control path and data path are separated, circuit delay is reduced, and complex instruction operations are balanced among multiple pipeline stages
它們將若干復雜指令操作均勻分配在幾個流水節拍內完成，實現了任意窗口尋址等復雜指令操作，將整個處理器的數據通路與控制通路分離，減小了電路時延，從而滿足了risc dsp不同指令功能和系統時鐘頻率的要求，構成了統一的、緊密聯系的、協調的md32系統結構。In sna, the layer within a half session that routes fmd requests and responses to particular nau services manager components and that provides session network services or session presentation services, depending on the type of session
在系統網路體系結構（ sna ）中，部分話路內的服務層，負責把操作管理數據（ fmd ）請求和響應郵送給特定網路可尋址單元（ nau ）服務管理程序，並提供話路網路服務或話路表示服務，具體是哪種服務依話路類型而定。The continuation of an operation from the maximum addressable location in storage to the first addressable location
從存儲器最大可尋址單元返轉到第一可尋址單元連續進行的一種操作。Pae is an intel - provided memory address extension that enables processors to expand the number of bits that can be used to address physical memory from 32 bits to 36 bits through support in the host operating system for applications using the address windowing extensions api
（ pae是intel提供的內存地址擴展機制，它通過在宿主操作系統中使用address windowing extensions api為應用程序提供支持，從而讓處理器將可以用來尋址物理內存的位數從32位擴展為36位。 ）Indirect memory operand
間接內存尋址操作數In computer graphics, a manually operated functional unit used to specify an addressable point
在計算機圖形學中，用來指明一個可尋址點的一種人工操作控制單元。This topic describes how to edit operators availability for receiving notifications and their e - mail, pager, and net send addresses
本主題說明如何編輯操作員接收通知的可用性以及他們的電子郵件地址、尋呼地址和net send地址。分享友人