幀分頻器 的英文怎麼說
中文拼音 [zhèngfēnbīnqì]
幀分頻器
英文
frame divider-
The focus is placed on the investigation of the standard of the encoding algorithm for mpeg audio layer iii, and the analysis of the major four modules in the compression algorithm, including encoding of subband filter bank, psychoacoustics model, quantification and huffman coding, frame packing
重點研究了mpeg音頻第層編碼的演算法標準。詳細分析了壓縮演算法中的四個主要功能模塊：子帶濾波器組編碼，心理聲學模型，比特流量化與霍夫曼編碼，幀數據流格式化。Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。A new bit rate control strategy with both global pre - allocation and local segmentation ( glas ) for low bit rate application is proposed. first, it allots bit date to every frame in advance according to possessive rate of buffer, and then distribute different quantization parameters according conctete detail. by means of this method, buffer is controlled more particularly. and the quality of decoded image is improved, the traditional video image coding method, that is to say, the intraframe coding based on dct and the interframe prediction coding based on motion compensation, is not suitable for low bit rate compression and aside from this, the encoder is too complicated
它首先在總體上根據緩存器的佔有率給每幀預分配比特數，然後再根據具體細節給予不同的量化參數。使緩存器得到了更細致的控制，解碼圖像的質量有所改善。針對傳統的視頻圖像編碼方法，即幀內基於dct的編碼加幀間基於運動補償的預測編碼存在不適于低比特率壓縮，編碼器復雜等不足，討論了基於3 - ddct的xyz視頻圖像壓縮編碼方法，提出了3 - ddct系數的三維「 z 」形掃描方案，大大提高了編碼效率。The transmit circuit includes convolutional encoding, framing, differential encoding, shaping filter, pn generator, hopping pattern generator, etc. the main part of receive circuit is matched filter
發送電路包括卷積編碼、成幀、差分、成形濾波、 pn發生器和跳頻圖案發生器等；接收電路的主要部分是匹配濾波器。The goal of this thesis is to accomplish base - band channel coding / decoding, fh framing / de - framing and fh synchronization, and also to control the modulator and demodulator in the prototype system. all these functions are implemented with a tms320vc5409 dsp
作為項目的一個重要組成部分，本文採用dsptms320vc5409實現了基帶處理部分的通道編解碼、跳頻意義的組拆幀和跳頻同步、並對調制解調晶元讀寫寄存器進行了配置。In chapter 5, the complex envelop simulation block diagrams of fh transmitter and receiver are presented at first. then key techniques of simulation system are discussed, including frame processing structure, fh sequence generator, etc. finally, simulation models of fh transmitter, receiver and jammer are presented. the influence of frequency excursion on performance of multi - tone continuous wave jamming is analyzed
第五章首先設計了跳頻發信機成員和接收機成員的復包絡模擬框圖;其次討論了跳頻模擬系統實現的關鍵技術，包括幀處理結構、跳頻序列發生器等;最後給出了跳頻通信發信機、接收機以及干擾機成員的模擬模型，分析了頻率偏移對多頻連續波干擾性能的影響。Image processing circuit made up of several following parts : the pretreatment of the video, a / d change, the frame memory, the track window and the digital signal proc
圖像處理電路由以下幾部分組成:視頻預處理、模數轉換、幀存儲器、跟蹤窗口、數字信號處理器。In order to deal with those problems above, a video surveillance scheme based on dsps was presented, which used high performance dsps to replace pc as central control unit. not only did we realize the hardware circuits of the system, but also we developed it ' s software. furthermore, three essential methods, for instance the data transfer method by extend direct memory access ( edma ), buffer management method by three buffer strategy and optimized data acquire method had been discussed
為了彌補這些不足，論文採用高性能的dsps取代傳統的pc作為核心處理器，設計了一種基於dsps的交通視頻監控系統的圖像處理平臺，詳細的對其硬體實現和軟體調試進行了論述；在這個基礎上分析了視頻圖像採集和處理的流程，討論了一種利用edma的實時后臺傳輸數字視頻方法和三幀緩沖的存儲器管理方法，為系統的實時性提供了保障。分享友人