幀同步控制 的英文怎麼說

中文拼音 [zhèngtóngkòngzhì]
幀同步控制 英文
frame synchronization control
  • : 量詞(幅, 用於字畫)
  • : Ⅰ名詞1 (步度; 腳步) pace; step 2 (階段) stage; step 3 (地步; 境地) condition; situation; st...
  • : 動詞1 (告發;控告) accuse; charge 2 (控制) control; dominate 3 (使容器口兒朝下 讓裏面的液體慢...
  • : Ⅰ動詞1 (製造) make; manufacture 2 (擬訂; 規定) draw up; establish 3 (用強力約束; 限定; 管束...
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  1. Later the couple nodes can implement the control frame transmission or data transmission. this kind of data transmission protocol based on slot precontract basically fulfills the networking and data transmission function

    呼叫協議主要用於完成點到點鏈路建立和業務通道的協商任務,協商完畢即可在後續的時間內在業務通道上完成或數據的傳輸。
  2. It is composed of three mian protocols : call synchronization protocol, control frame transmission protocol based on arq mechanism and data transmisstion protocol based on slot precontract mechanism. one scan channel table is shared in the hfmanet. the nodes in the same dwell group work in the same scan channel, and the nodes in the different dwell group work in the different scan channel

    該協議的網路拓撲結構採用分散式分群結構,協議不於傳統的短波點到點及需要中心節點轉發的組網方式,而是初實現了短波電臺之間多跳組網功能,其協議內容主要包括呼叫協議、基於arq的傳輸協議和基於虛電路及時隙預約方式的數據傳輸協議。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的時還負責系統的邏輯;視頻數據存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關信號; d a編碼模塊在視頻處理模塊的下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. Performance requirements of audiovisual terminals - frame - synchronous control and indication signals for audiovisual systems

    視聽用戶終端技術要求視聽系統中和指示信號
  5. At the base of earnestly analysis to the ov7620 working sequence, using its frame synchronization, field synchronization and the pixel - clock signal, completed gathering of the active power meter reading image which is reduced resolutions at the control of mcu

    在仔細分析ov7620工作時序的基礎上,利用其、場和像素時鐘信號,在單片機的下完成了對電度表讀數圖像的降低解析度採集。
  6. It involves the communication between the visualgenserver and system of tower simulator, the communication between the visualgenserver and visualgenclients. frame control and the synchronization of visualgenclients. in the third part, we present the design and implement of visualgenclient, which deals with how to realize the render of a scene using 3d graphics engine performer

    摘要2 )著重介紹視景服務器的設計和實現,在此部分涉及到了視景服務器自身的體系結構、鍵盤和鼠標事件處理、視景服務器和塔臺模擬機系統服務器之間的通訊、視景服務器和從視景位之間的通訊,以及如何從視景位的等。
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