指令執行邏輯 的英文怎麼說

中文拼音 [zhǐlìngzhíhángluó]
指令執行邏輯 英文
instruction execution logic
  • : 指構詞成分。
  • : Ⅰ動詞1 (拿著) hold 2 (執掌) take charge of; control; manage; wield 3 (堅持) persist in; sti...
  • : 行Ⅰ名詞1 (行列) line; row 2 (排行) seniority among brothers and sisters:你行幾? 我行三。where...
  • : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • 指令 : 1 (指示; 命令) instruct; order; direct2 (上級機關對下級機關的指示) instructions; order; direc...
  • 邏輯 : logic
  1. The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block

    設計的riscmcu採用14位字長總線和8位字長數據總線分離的harvard結構和二級流水設計,並使用硬布線代替微程序控制,加快了微控制器的速度,提高了效率。
  2. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位字長和8位數據字長,通過設計單周期、在內部設置多個快速寄存器及採用硬布線代替微程序控制的方法,加快了微處理器的速度,提高了效率。
  3. In a computer, a functional unit that interprets and executes instructions. note : a processor consists of at least an instruction control unit and an arithmetic and logic unit

    計算機中,解釋並的一種功能單元。注:處理器至少包含有一個控制器和一個算術與運算器。
  4. The control unit, which extracts instructions from memory and decodes and executes them, calling on the alu when necessary

    控制單元,從內存和代碼中提取他們必須的時候訪問算術單元。
  5. Firstly, for the purpose of research and verification of multithread microprocessor, a superscalar microprocessor model armp - v2 is built on the basis of armp microprocessor ; secondly, the issue logic is not only the critical path in a superscalar microprocessor, but also critical to the performance of a multithreaded microprocessor with superscalar execution core

    首先,在設計的嵌入式微處理armp的基礎上進改進,提出了一個超標量處理器模型,用於多線程處理器系統結構的研究與驗證。其次,發射是超標量處理器中的關鍵路徑,也是制約單元為超標量結構的多線程處理器主頻提高的關鍵因素。
  6. Because with ia - 64, the whole premise is to basically simplify the chip as much as possible in terms of the issue logic and the instruction execution, and to put more emphasis on the compiler

    因為,對于ia - 64 ,整個前提就是在發送方面從根本上盡可能地簡化晶元,而將更多的注意力放在編譯器上。
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