指令集模擬 的英文怎麼說

中文拼音 [zhǐlìng]
指令集模擬 英文
instruction set simulation (iss)
  • : 指構詞成分。
  • : gatherassemblecollect
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 動詞1. (設計; 起草) draw up; draft 2. (打算; 想要) intend; plan 3. (模仿) imitate
  • 指令 : 1 (指示; 命令) instruct; order; direct2 (上級機關對下級機關的指示) instructions; order; direc...
  • 模擬 : imitate; simulate; analog; analogy; imitation; simulation模擬艙 boilerplate; 模擬電路 [電學] circ...
  1. The procedure functions in the compare between partial image of dynamic collection and corresponding image of the airscape. in chapter 5, basing on the analysis of correlative theory of digital image, we introduce the improved fasted - down algorithm and simulative anneal algorithm, which applies to nn calculation, an d bring forward the unique and effective means, correlative original value evaluation. basing on the combination of correlative arithmetic, a stable, high - speed and exact correlative arithmetic is formed, which makes it possible to apply computer vision detection of single - needle quilting in industrial production

    本文展開研究並取得一定成效:構建了基於pci總線的微機實時圖像採系統;在採的布料總圖(鳥瞰圖)的基礎上,通過數字圖像的數字濾波、圖像增強、邊緣檢測等處理,提取布料圖像的邊緣,對輪廓的矢量化的象素點進行搜索,得到相應的圖案矢量圖,從而確定絎縫的加工軌跡,生成加工;在進給加工過程中,主計算機對動態局部圖像與總圖(鳥瞰圖)的對應部分進行圖像相關的匹配計算,應用數字圖像理論,結合神經網路計算的改進最速下降法和退火演算法,提出獨特而有效的相關迭代初始值賦值方法,形成穩定、高速和準確的相關運算,實現單針絎縫視覺測量和自動控制。
  2. In this paper, using a top - down design scheme, the risc mcu ip core is divided into two parts : data path and control path. all the modules in the two parts are described by verilog hdl, a kind of hardware description language. the simulation and synthesis of the whole work are finished successfully with eda tools

    本文對pic16c6x單片機系統結構、系統和系統時序進行了分析,並且在此基礎上對精簡mcuip核進行頂層功能和結構的定義與劃分,建立了一個可行有效的riscmcuip核型本文將mcuip核劃分為數據通道與控制通道兩部分,採用asic設計中的高層次設計方法,使用硬體描述語言veriloghdl對這兩部分的各功能塊進行了設計描述;利用多種eda工具對整個系統進行了驗證與綜合。
  3. After implementing digital signaling system into analogue trunking system, we get these improvements : more reliable connection between users, higher speed of connection, and more functions in trunking system. mdc1200 signaling system is one kind of this signaling, which is developed by motorola for improving the performance of its analogue trunking system

    群通信是它採用語音進行通信,整個系統內沒有數字技術,但后來為了使通信連接更為可靠,群通信系統也採用了數字信,使群通信系統的用戶連接比較可靠,連通的速度有所提高,而且系統功能也相應增多。
  4. This paper mainly focuses on the following three field : system structure, system hw / sw ( hardware / software ) partition. synthesis and verification. and presents a hw / sw co - design method based on ip ( intellectual property ) core. we use this method to design asip, and verify this virtual machine using instruction codes, ac - 3 codes and ts ( transport stream ) flow

    本文從晶元系統的整體入手,重點從系統的結構、軟硬體分割以及晶元系統的設計驗證三個方面對該晶元系統的設計做了深入的研究,提出了一種基於ip核的軟硬體協同設計方法,運用該方法對asip進行設計,並採用虛機的型,採用程序、 ac - 3解碼程序、 ts流程序進行驗證。
  5. The significant investigation result of this paper are as follows : in the first chapter, we firstly introduce the basic concept and important electrical characteristics of digital to analog converter and bandgap reference, review the historical progress of electric filters, summarize the methodologies and implementing techniques of filters, and then analyze the practical circuits realization of filters and unrealistic impact factors on performance of filters, finally, we set forth significance of this studying problem and main research work of this paper

    並將其成功地應用於通信成電路上,取得了人滿意的實際應用成果。本文的主要研究成果如下:第一章:首先介紹了數轉換器的基本概念及其關鍵特性標,接著綜述了成濾波器的發展簡史、設計方法和實現技術。然後分析了濾波器實際電路實現及其非理想因素對其性能的影響,闡述了本課題的研究意義以及本文所做的主要研究工作。
  6. What is more, based on the computing model of the finishing time per piece of flow shop scheduling in the parallel movement, the paper analyzes the subordinate function of its finishing time per piece in respective conditions of definite due date and fuzzy due date, and mutual relationship of two objective functions between minimization of delayed term and maximization of general satisfaction, pointing that the former is the subset of the latter. and representing the satisfaction level of the manager toward finishing time of the piece with the subordinate function of fuzzy due date, making general satisfaction level as objective function, the paper accordingly sets up a mathematical model in the condition of fuzzy due date, and designs a computer simulating system in light of genetic algorithm to carry on an emulation experiment

    在平行順序移動方式下flowshop調度問題的工件完工時間的計算型基礎上,分析了帶固定交貨期和糊交貨期時該問題的工件完工時間的隸屬函數,及總拖期最小化和總滿意度最大化這兩個目標函數的相互關系,出前者西南交通大學博士研究生學位論文第頁問題是後者問題的一個子,用每個工件糊交貨期的隸屬函數表示決策者對該工件完工時間的滿意度,以總滿意度為目標函數,相應地建立了該問題下帶糊交貨期的數學型,設計了一個基於遺傳演算法的計算機系統進行試驗,結果是人滿意的。
  7. Design and implementation of dsp instruction set simulation

    指令集模擬器的設計與實現
  8. High performance retargetable instruction - set architecture simulation technique

    高性能可重構架構技術
  9. Finally, encapsulate iss ( instruction set simulation ) using systemc ( a system - level modeling platform based on c + + class library ), and embed gdb into this simulation environment, then form a software simulation platform

    最後用systemc (基於c + +類庫的系統級建平臺)對指令集模擬器iss進行封裝,並把調試器gdb無縫地嵌入到該環境中,形成一個軟體平臺。
  10. This is a dlx instruction set simulator with pipeline and non - pipeline implementation. at present it only supports integer pipeline

    這是一個具有流水線和非流水線實現的dlx指令集模擬器。目前它僅支持整數流水線。
  11. Dlx simulator - this is a dlx instruction set simulator with pipeline and non - pipeline implementation. at present it only supports integer pipeline

    這是一個具有流水線和非流水線實現的dlx指令集模擬器。目前它僅支持整數流水線。
  12. In this paper, it introduced a process that design a instruct set simulator ( iss ) for arm which on the basis of system - level - design for soc, and it also analyzed what the problems is on how to design a iss, and how to resolve it

    本文介紹了基於soc系統級設計的arm指令集模擬器的設計過程,從中分析了設計iss所遇到的問題,以及如何解決等內容。
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