擬寄生 的英文怎麼說

中文拼音 [nǐjìshēng]
擬寄生 英文
parasitoidism
  • 擬 : 動詞1. （設計; 起草） draw up; draft 2. （打算; 想要） intend; plan 3. （模仿） imitate
  • 生 : Ⅰ動詞1 （生育; 生殖） give birth to; bear 2 （出生） be born 3 （生長） grow 4 （生存; 活） live;...
  1. The term pseudoresistance may be applied to apparent resistance which results from transitory characters in potentially susceptible host plants.

    擬抗蟲性一詞可適用於潛在感蟲寄生植物的過渡性狀所產生的表面抗性。
  2. Thirdly, two kinds of the methods to improve the performance of filter stopband has been discussed. these methods are used to cleared up the influence of the parasitical passband. through the simulation and test result shows that these methods " s performance is expected

    第三，論了2種對濾波器阻帶抑制進行改善的方法，以消除寄生通帶的影響，通過模擬和實際製作濾波器的測試結果。
  3. A model of the interface state density distribution near by valence band is presented, and the dependence of the threshold voltage on temperature, the c - v characteristics and the subthreshold characteristics are predicted exactly with this model ; the effects of s / d series resistance on the output characteristics, transfer characteristics and effective mobility of sic pmosfets are analyzed. thirdly, the output characteristics and the drain breakdown characteristics are modeled with the procedure medici. the output characteristics in the room temperature and 300 ? are simulated, and the effects of gate voltage. contact resistance, interface state and other factors on sic pmos drain breakdown characteristics are analyzed

    提出了一個價帶附近的界面態分佈模型，用該模型較好地描述了sicpmos器件閾值電壓隨溫度的變化關系、 c - v特性曲線以及亞閾特性曲線；分析了源漏寄生電阻對sicpmos器件輸出特性、轉移特性以及有效遷移率的影響；論文中用模擬軟體medici模擬了sicpmos器件的輸出特性和漏擊穿特性，分別模擬了室溫下和300時sicpmos器件的輸出特性，分析了柵電壓、接觸電阻、界面態以及其他因素對sicpmos擊穿特性的影響。
  4. Should indirect effects on predators and parasitoids of target pests be regarded as harm

    目標害蟲的捕食者和擬寄生物間的間接影響應該被當作危害嗎？
  5. The mixed - signal flow should realize the communication between the digital circuit and analog one. it includes mixed - signal simulation, integration of the layout of digital and analog circuit, parasitic extraction and post - simulation

    數模混合的設計流程要實現數模電路之間的信號通訊，它的主要流程包括：數字模擬電路的混合模擬，數字模擬電路版圖的整合和數字模擬電路提取寄生參數后的模擬。
  6. Lovrin 10 and cv. 5389. by using this system, following questions were investigated : the change of the pattern of microtubules when treated with iwf ; the change of cytosolic calcium levels in the protoplasts when treated with iwf and the influence of microtubule depolymerization prior to iwf treatment on the levels of cytosolic calcium

    試驗的目的是以激發子?原生質體簡化試驗系統來模擬葉銹菌侵染小麥葉片的互作體系，探討激發子刺激后寄主植物微管骨架的動態變化及胞內ca ~ （ 2 + ）水平的變化規律，為進一步探討激發子誘導防衛反應的信號轉導途徑奠定基礎。
  7. Theoretically several solutions are derived in the final scheme such as broadband matching technology which included negative - feedback technology, traveling wave technology and balance technology. in addition, the design will be optimized by eda software and the final test result indicates that our design is successful. the principle of microwave amplifier is introduced at first in this paper, especially its main parameters index sign, then the material performance and the influence of parasic parameter and model setting of the gaas phemt is discussed

    文中首先介紹寬頻帶放大器的主要參數指標，接著介紹了gaasfet的材料特性，以及phemt管芯寄生參數對實際放大器設計的影響，然後討論gaasphemt的大、小信號模型的建立與分類;結合gaasphemt模型和s埠參數分析了寬頻帶匹配技術的原理;最後論述本課題中各個放大器實現的具體方案，以及在放大器實現過程中應該注意的問題，給出了實際寬帶放大器的測試結果，並將軟體模擬結果與實測曲線進行對比。
  8. The macromodel is built up with the combination of device simulation and nonlinear curve fit, which makes the extraction of the substrate parasitic parameters more convenient and the circuit simulation more accurate

    該宏模型通過器件模擬與非線性擬合相結合的方法建立，使襯底寄生參數的提取更加方便，同時保障了深亞微米電路特性的模擬精度。
  9. With the software cadence, model establishment and parasitic parameter extraction are made on the main pcb lines of the proposed circuits. equivalent circuit models of common mode combined with differential mode current and noise simulation models are also established on full bridge switching - mode converters. study on the simulation of conducted interference noise is made with the software saber and the effects on the circuits " noise by the main parasitic parameters are also analyzed

    在對全橋開關型變換器電路工作原理分析的基礎上，建立了全橋開關型變換器主要元器件的電磁干擾參數模型，利用cadence軟體對其pcb主要印製導線進行了建模分析和寄生參數的提取，得到了全橋開關型變換器傳導干擾的共模、差模噪聲電流等效電路模型以及噪聲模擬模型，並運用saber軟體進行了傳導性干擾噪聲的模擬研究，分析了主要寄生參數對電路噪聲的影響。
  10. The source drain extension ( sde ) structure and its reliability are thoroughly studied. first, it is shown that the sde structure can suppress short channel effect effectively and the parasitic resistance at the sde region has an effect on performance. it is proposed that increasing the dose condition in the sde region can reduce the parasitic resistance and should be adopted to achieve high performance for deep submicron devices

    本文對深亞微米源漏擴展mos器件結構及其可靠性進行了深入研究，首先通過模擬驗證了源漏擴展（ sde ）結構對短溝道效應的抑制， sde區寄生電阻對器件性能的影響以及sde區摻雜濃度的提高對器件性能的改善，指出了器件尺寸進一步減小后，提高源漏擴展區摻雜濃度的必要性。
  11. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ，其它ram則利用微碼rom中的微程序進行測試，而微程序的運行則可以順帶覆蓋其它數據通路，從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計，除必備的幾條邊界掃描指令外，還提供了debug 、 runbist等指令以支持內部故障測試、在線調試及內建自測試;內部掃描採用部分掃描策略，選擇邏輯部件的邊界及用戶關心的系統寄存器進行掃描，從而實現了硬體邏輯劃分，方便了后續的測試碼產生和故障模擬，並為在線調試打下了基礎。
  12. On the other hand, we accomplished the asic design flow successfully based on the fpga design. we have made the most use of various optimization methodology and simulation tools include dynamic simulation, static timing analyzing and post simulation. at last this design net list was past to layout design team in order to check its electronic characters

    在我們的asic流程中，首要的因素是在fpga驗證其正確性的基礎上對速度與面積進行科學有效的平衡，在成本和性能中間取得良好的結合點，運用先進的eda設計工具和演算法對設計進行綜合優化（ synthesis ） ，動態時序分析（ dynamicsimulation ） ，靜態時序模擬（ sta ）到自動布局布線（ apr ）之後將寄生參數反標回前面的步驟進行更精確的判斷和分析，最後交給版圖設計人員進行版圖設計和優化。
  13. Finally, the author emphasizes on recommendations / models of reforming plan, restructuring and marketing management. wysic has made tactic strategies including exploring market, centralizing facilities, identifying marketing objectives, setting up corn management, imitating alliance, " autoeciousness ", creating new market and multi - products policies

    武漢長江輪船公司工業公司制定戰略原則：市場拓展原則、資源集中原則、確定目標市場原則、確立核心管理職能的原則、虛擬聯盟的原則、 「寄生」原則、創造新市場原則、產品功能多樣化的原則。
  14. Claim : any claim to the sellers of whatsoever nature arising under this contract shall be made by registered mail within 45 days after the arrival of the merchandise at the destination ecified in the bill of lading and further full particulars of such claim shall be made in writing and forwarded by registered mail to the sellers within 15 days after notifying, accompanied by such particular ' s survey report is sued by leading, first cla and international sworn authorized surveyor ( s )

    索賠：本合約下產生的不論什麼性質的向賣方的索賠，必須在貨物到達提貨單上所指定的目的地之後四十五天內用掛號郵件提出，並在通知后十五天內進一步書面擬就這種索賠的完整詳細情況並用掛號郵件寄給賣方，附上主要的、第一流的經國際宣誓認可的公證人關于這種細情的公證報告。
  15. Claim : any claim to the sellers of whatsoever nature arising under this contract shall be made by registered mail within 45 days after the arrival of the merchandise at the destination specified in the bill of lading and further full particulars of such claim shall be made in writing and forwarded by registered mail to the sellers within 15 days after notifying, accompanied by such particular ' s survey report is sued by leading, first class and international sworn authorized surveyor ( s )

    索賠：本合約下產生的不論什麼性質的向賣方的索賠，必須在貨物到達提貨單上所指定的目的地之後四十五天內用掛號郵件提出，並在通知后十五天內進一步書面擬就這種索賠的完整詳細情況並用掛號郵件寄給賣方，附上主要的、第一流的經國際宣誓認可的公證人關于這種細情的公證報告。
  16. Design flow of analog circuit begins with drawing schematic and includes simulation, layout, drc / lvs check, parasitic extraction and post - simulation

    模擬電路從schematic開始，其設計流程包括：模擬，版圖繪制， drc lvs檢查，寄生參數提取和后模擬。
  17. We choose hb qrc convert as the research object. this paper has completely analyzed the circuit work modes, designed an experimental device, analyzed the mam noise source, established the common - mode and different - mode noise current models, extracted the parasitic elements of four pcb layout and simulated each emi level. based on these, it has derived the element which have great effect on pcb emc and has designed the optimized pcb layout

    選擇一種半橋準諧振變換器作為研究對象，對其工作原理進行了詳細的分析，製作了實驗樣機，分析了它的主要干擾源，建立了它的共模、差模噪聲電流等效電路模型，對它的四種不同pcb布局進行了寄生參數提取和電磁兼容模擬，在此基礎上分析得到了影響其電磁噪聲水平的最重要因素，並設計出了最優的pcb布局。
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