整流式計數器 的英文怎麼說

中文拼音 [zhěngliúshìjìshǔqì]
整流式計數器 英文
commutator type meter
  • 整 : Ⅰ形容詞1 （全部在內; 完整） whole; all; complete 2 （整齊） neat; tidy; orderly Ⅱ動詞1 （整理; 整...
  • 流 : Ⅰ動1 （液體移動; 流動） flow 2 （移動不定） drift; move; wander 3 （流傳; 傳播） spread 4 （向壞...
  • 式 : 名詞1 （樣式） type; style 2 （格式） pattern; form 3 （儀式; 典禮） ceremony; ritual 4 （自然科...
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 計數 : count; tally; counting計數卡 numbered card
  1. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  2. The whole circuit ' s timing generation and synchronization was realized with cpld. as the channel of data transmitting, pof can isolate high voltage part and low voltage part efficiently. at the same time, a single chip processor was used to design a digital meter for the fiber current transducer

    系統採用cpld實現整個工作電路的時序發生和同步協調，利用光纖實現高壓部分和低壓部分的完全電氣隔離和實現信號傳輸，採用單片機技術實現混合式光纖電流互感器專用數字顯示儀表的設計。
  3. The plate - tube evaporator, the single back - fin evaporator and the box condenser. after analyzing the physical model and setting up the mathematical model according to the two - phase flow of adiabatic capillary tubes, it also numerically simulates and analyzes the different effects of main parameters on the capillary tube length. based on the heat transfer analysis and counting of thermal insulation layer, the cad system accomplishes the parametric design and drawings of the refrigerator body

    該系統完成了對典型製冷裝置的換熱器部件，如板管式蒸發器、單脊翅片管式蒸發器、箱壁式冷凝器的參數化設計和繪圖；分析了絕熱型毛細管兩相流的物理模型，並建立數學模型，對絕熱型毛細管各主要參數對其長度的影響進行了數值模擬和計算分析；基於對電冰箱箱體絕熱層厚度的傳熱分析和計算，完成了整個箱體的參數化設計和繪圖工作。
  4. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  5. With promulgation and obliging actualization of iec 1000 - 3 - 2 etc. international standards, power factor correction ( pfc ) technique become a hotspot of research in power electronics field. based on average current mode, the paper introduce the design and implementation of a fully digital controlled single - phase boost power factor corrector with fast response. the control - loop circuit is realized using digital control and the corrector can tend to unity power factor, lower current harmonics and high transfer efficiency

    本文在平均電流模式控制的有源功率因數校正技術的基礎上，設計了一種控制電路基於數字信號處理器（ dsp ） 、主電路採用boost變換器拓撲結構的全數字單相功率因數校正器，用數字電路代替傳統的模擬電路來實現對整個迴路的控制，最終使得校正器具有輸入功率因數接近於1 、低電流諧波以及高轉換效率的特性。
  6. In chapter 5, the stream media server design is presented, including data flow - design, uml design, device driver interface and rtp / rtcp module design in chapter 6, the main research conclusion is summarized

    第五章詳細介紹了嵌入式流媒體服務器程序的設計，包括整體數據流分析， uml設計和詳細的驅動介面模塊， rtp rtcp協議模塊設計。
  7. Though standard cast resin dry - type transformers can meet the demands of most consumers. we still have to proceed special designing of transformers for special application field and operating conditions, such as single phase transformers, regulating transformers with onload tap changer, double voltage transformers, isolating transformers, rectifying transformers, earthing transformers and transformers with special tapping arrangement, which we are supplying to consumers all over the country

    雖然標準的樹脂絕緣乾式變壓器已能滿足大多數用戶的要求，但是對于某些特殊的應用領域與使用條件仍需我們進行特殊設計。諸如單相有載調壓雙電壓變換隔離整流接地以及有特殊出線排列的變壓器，我公司在不斷地提供給各地的用戶。
  8. If the technicians applied technology in the wrong, even achieving the business logic, but probably leading to many vices including low performance, low scalability, close coupling, low software duplication. so how to assemble the j2ee technology reasonable and achieve a system with high performance and high expansibility is my research emphasis in the thesis. in order to solve the problems and implement efficient web application, the paper put forward ejs _ mvc model according mvc pattern and we can assemble component by using ejs _ mvc model, it can solve many problems of web application and improving system with clear flow and clear function partition, in addition, due to controller is the most importance in the ejs _ mvc model, so the thesis also discuss some problems about controller design ; if the model is not designed accurately, system performance will encounter fatal influence, so the article lucubrate ejb technology from ejb choice, ejb optimized design, database access, design pattern etc and bring forward some strategies and methods about how to build efficient business tier ; finally based on ejs _ mvc model, a example that contains simple business logic is developed according to the object - orient software engineering thinking and some strategies and methods proposed by the thesis, in the process of achieving system function, the emphasis is probing into how t o assemble and apply technology reasonable and providing a new thinking thread and method contributing to build high effective and flexible j2ee application

    由於j2eeweb應用是由組件組成，因此為了解決上述問題，實現高效的應用，本文首先從如何合理組合組件入手，找到一種方法使各組件能具體分工而又緊密合作，在深入研究各組件基礎上，根據mvc模提出了ejs _ mvc模型概念，指出可按此模型組合各層組件，該模型可以解決傳統web開發中存在的問題，而且具有系統流程與系統功能劃分清晰，可擴展性、可維護性強等優點，另外由於控制器是ejsmvc模型的重中之重，它起到承上啟下的作用，它設計好壞直接關繫到整個應用的性能、伸縮性與擴展性，因此又探討了控制器設計的有關問題；另外如果模型設計不當的話，對系統性能造成的影響可能是致命的，因此本文又從ejb組件選擇、 ejb調優設計、數據庫訪問和設計模式等方面對ejb技術作了全面的分析研究，指出在業務層中如何避免太多網路遠程調用和提高業務層性能，特別是根據前面的分析總結出了業務層的優化分層組合模型，這個模型的使用無疑會使業務層具有較高的性能與伸縮性；最後選擇一個業務邏輯較簡單的系統，使注意力集中到運用的j2ee技術上來，按照ejs _ mvc模型與軟體工程流程以及本論文所提出的方法與策略實現業務邏輯，在實現過程中具體探討如何合理運用組合技術，就多層j2ee體系結構的設計思想作深入的探討實踐，為實現高效、靈活的多層j2ee應用提供一種新的思路及方法。
  9. Aimed at performance improvement for the iocp multimedia network server in large - scale complex environment, this paper presents the methods concerned with network base development, configuration design and the logical module design as follows : elevate data processing efficiency by optimizing the data package and transmission, enhance code reusability and extendibility by modular construction, and further optimize the logical module performance through port dispatch

    摘要面臨iocp多媒體網路服務器所的大復雜度環境設計問題，本文論述該網路服務器的網路底層開發、結構設計及邏輯模塊設計，提出提高其性能的方法：優化數據封裝以及投遞方式，增加數據的處理效率；整體結構模塊化設計，提高代碼的可重用性以及可擴展性；通過埠分流的方式，實現對邏輯模塊性能改進。
  10. Firstly, i introduce the hardware and software platform of embedded system, and explain the basic hardware and software development, it ’ s a cooperate process. then i analyse the cross development method for embedded system, mentioned the “ host ” and “ target ” in the development of an embedded system. take e - book project as an example, follows the process to introduce a real embedded system project, including the mcu, periphery hardware and the integrated development environment which can provide the whole platform for an integrated development on the pc - - wb33. then i present 3 of the hardware of e - book. for lcd, i introduce the common feature of lcd, the ssct lcd as well as the design, actualize of its driver. for the rs232 serial port, the principle of the serial port and the main driver of it are introduced. for flash memory, i introuce the principle of nor flash and nand flash, and how their drivers implemented. in the end, the conclusion of this paper is generated, there is also a prospect for further research

    以一個實際的嵌入式開發項目? ?電子閱讀器為例，按照項目開發流程，介紹了包括項目所使用的微控制器mcu及片內周邊電路;項目所使用的基於mcu的集成開發環境? ?能在pc機上提供完整集成開發的平臺wb33 ，使用它可以很方便的在pc機上模擬目標機的環境。詳細介紹了電子閱讀器的三個底層硬體:對項目中採用的ssctlcd的特性以及其驅動的設計和實現的過程進行了詳細介紹;對rs232串口驅動，介紹了接收端即電子閱讀器端實現串口驅動介面的主要函數;對flash閃存驅動，分別介紹了norflash和nandflash的原理以及它們的驅動實現。最後，對全文給以總結，並對以後進一步的研究做出了展望
  11. The transistor count is 3. 8 million ; the package is surface mount 240 - pin quad flat pack ( qfp240 ) ; and the die size is 98mm2 ; the most advanced research progress on microprocessor architecture is extensively studied to get technical preparations for microprocessor design

    該處理器目前正在進行後端設計，即將採用0 . 25 mcmos工藝流片，整個處理器的晶體管數目為380萬，封裝形式是qfp240 ， die面積為98mm ~ 2 。
  12. This paper have discussed in detail the automtibile that becomes by pic single flat organization travel the basically working principle of recorder systematic overall design, the interface design of memory and single flat machine, the interface design of the single flat machine and clock of real time, speed sensor design and the small - sized switch design of power source, systematic hardware and software realization method, as well as software process and data form the design of the user interface stipulated

    本文詳細論述了由pic單片機構成的汽車行駛記錄儀系統的整體設計、單片機與存儲器的介面設計、單片機與實時時鐘的介面設計、速度傳感器設計、小型開關電源設計的基本工作原理，系統硬體及軟體實現方法，以及軟體流程、數據格式約定和用戶界面的設計。
  13. So most software can be test on the pc and can be transplanted to gateway after all is ok. the platform is designed from top to bottom, at first, the functionalities and interface of the three module should be specified clearly, and then go into the details of it, came back to modify the interface made before. the tree modules are connected through pci bus. adsl module implements the adsl modern as the atu - r ; the network interface consists of two part, wileless lan ( it is optional ) and lan, can connect with two different lan. the main control module controls the action of the others which is made of sdram, microcontroller, flashrom and serial port

    為了設計方便，整個硬體平臺按照自頂向下的設計方式，首先按照功能分為三部分： adsl模塊，網路介面模塊，主控模塊，這些模塊之間採用流行的pci總線相連接，規定模塊之間的介面關系，然後進行細化，反饋回來完善原先定義的介面關系。其中， adsl模塊可作為單獨的adsl數據機使用，起到atu - r的功能：網路模塊由兩部分組成，無線lan和lan介面（其中前者為可選項） ，可以連接wirelesslan和lan 。主控模塊起到協調的作用，包括sdram 、微控制器、 flashrom 、串口等。
  14. Utilizing backstepping procedure, general expression of control strategy for hvdc converters is acquired. the control strategy can restrain the nonlinear uncertainty through injection of nonlinear damping terms in virtual controllers. the proposed decentralized adaptive control scheme guarantees that all the signals in the closed - loop system are bounded in the presence of high order interconnections and bounded disturbances

    設計中引入自適應非線性阻尼項來抑制系統非線性不確定參數和未知有界干擾的影響，同時採用反演設計方法來克服控制器設計的復雜性，最後獲得高壓直流輸電系統換流站的分散魯棒自適應控制策略的一般表達式，並提供了整個系統的穩定性證明。
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