數字同步信號 的英文怎麼說

中文拼音 [shǔzìtóngbùxìnháo]
數字同步信號 英文
digital sync signal
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 步 : Ⅰ名詞1 （步度; 腳步） pace; step 2 （階段） stage; step 3 （地步; 境地） condition; situation; st...
  • 號 : 號Ⅰ名1 （名稱） name 2 （別號; 字） assumed name; alternative name3 （商店） business house 4 （...
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  1. The results of experiment tell it is an effective method of share current. a strategy of synchronization control, which combines competition coequality and priority, is mentioned in the paper and uses digital phase - lock loop to track synchronization signal

    在同步控制上，應用了「優先與搶占」的方式產生同步信號，純硬體實現，簡單可靠；使用了成熟的數字鎖相環來跟蹤同步信號。
  2. The system comprises three modules : the first is the ccd driver module, which controlled with cpld. programming the cpld to produce ccd driving pulses and synchronized communication signals. after preprocessing, the output video signals are transmitted into high resolution adc module, in which they are converted into digital signals, and then processed in arm processing module

    整個系統分為三個模塊: ccd驅動模塊的核心是一片復雜可編程邏輯器件（ cpld ） ，對其編程產生ccd的驅動脈沖及同步控制信號;視頻輸出信號經預處理后，由高精度ad轉換模塊進行采樣，將ccd輸出的模擬信號轉換成數字量;最後，將數據送入arm處理系統中進行后續處理。
  3. The second, the main work in the paper is discussed. they are include : the theory and character of electromagnetic leaking from a computer ; the theory of accumulation mean filter and pectination filter ; the analysis of synchronous signal precision, at 10 - 12 second level, for stably intercepting ; the technology requirement of receiver and data acquisition board for clearly displaying the images recovered from the intercepted data

    本文從計算機視頻電磁泄漏和數字濾波器兩方面的基本理論出發，詳細論述了計算機視頻信息電磁泄漏的原理及特點，指出視頻泄漏信息的頻譜是以行頻為周期的譜線；分析了重加濾波器和梳狀濾波器的性能；分析了視頻泄漏信息截獲的條件；推導出穩定截獲視頻泄漏信息需要對同步信號的精度控制在皮秒級；論述了清晰再現對接收機和數據採集卡的技術要求。
  4. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  5. The field of video signal processing is now undergoing a digital reform. the digital processing technique is clearly expatiated in this paper, such as a / d convert, anti - alias filter, clamp control, gain control, pll, synchronization circuit, color decoder, comb filters

    本文詳細敘述了視頻圖像的數字處理方法，重點介紹了視頻信號數字化技術、抗混疊濾波器、箝位、增益控制、鎖相技術、同步時鐘產生、電視信號亮色分離、彩色解碼等技術，這些關鍵技術為視頻信號的數字化處理提供了重要的基礎。
  6. The synchro / resolver signal transmit & receive card is the most important and difficult part which used special a / d and d / a ( axis angle converter ) to make conversion between the analog singnals related to angle and its digital counterpart, thus solve the issue of stimulation and test of synchro / resolver signal ， improved the test precision and automatic degree

    其中同步器卡的開發是難點和重點，它採用特殊的數/模、模/數轉換器件?軸角轉換器，實現了角位-數字信號相互間的直接轉換，解決了隨動系統性能檢測中三相同步器信號激勵與同步器信號/分解器信號數字化檢測問題，有效提高了系統的自動化程度和檢測精度。
  7. A / d samples the intermediate frequency signal. the digital signal proceeding part based on tigersharc dsp can process the baseband digital signal including the algorithm of baseband modulation, baseband differential detection and symbol synchronization, etc. digital up converter supports interpolation filter and complex mixer

    A / d對中頻信號進行采樣，數字信號處理部分以tigersharcdsp為核心，負責基帶采樣數字信號的處理，實現基帶信號調制，基帶差分解調，符號同步的捕獲和跟蹤等演算法。
  8. Nowday the digital television is springing up soon. but its prevalence needs a long time. in this process, we should not only take full use of the system of traditional analog televion we have, but also improve the quality of the picture of analog television

    在這個過程中我們既要利用現有的模擬電視系統，同時又要逐步的提高模擬電視的收視質量。目前市場上出現一種基於數字處理方法提高傳統模擬電視信號接收質量的電視機，我們稱它為數字處理電視。
  9. For digital audio encoding and decoding modules, delta - sigma modulation is introduced and audio data, preambles with accessorial data are multiplexed according to the digital audio interface standard ; for carrier wave, pll frequency synthesizer is used ; for frequency modulation, voltage control oscillator is taken ; for demodulation, pll frequency discrimination is adopted

    調制方式，並按照數字音頻介面標準對音頻數據、同步字和附加信息進行通道復用;對于載波信號，採取鎖相環頻率合成技術手段;對于頻率調制，採用壓控振蕩器;對于解調電路，採取鎖相環鑒頻電路。
  10. The whole circuit ' s timing generation and synchronization was realized with cpld. as the channel of data transmitting, pof can isolate high voltage part and low voltage part efficiently. at the same time, a single chip processor was used to design a digital meter for the fiber current transducer

    系統採用cpld實現整個工作電路的時序發生和同步協調，利用光纖實現高壓部分和低壓部分的完全電氣隔離和實現信號傳輸，採用單片機技術實現混合式光纖電流互感器專用數字顯示儀表的設計。
  11. Bits supplies the synchronous timing signal to these equipments inside the telecommunicationt building, such as dps, atm, no. 7, dxc, tm & adm in sdh, don and in etc. the related techniques are involved in the content of synchronization ne twork, timing distribution, the timing signal transportations x impairments etc. the second chapter tells the structure and the function of the building integrated timing system. the third chapter summarizes the digital synchronization network techniques, which emphasizes the basic concept of synchronization networks analyzes the necessity of building the synchronization network and introduces all kinds of synchronization methods. the fourth chapter represents the transportation of the synchronization signal

    本文第二章講述了通信樓綜合定時系統的構成及作用：第三章概述了數字同步網技術，著重描述了同步網的基本概念，分析了建立同步網的必要性，講述了各種同步方法；第四章闡述了同步定時信號的傳輸；第五章介紹了bits設備所支持的同步狀態消息；第六章、第七章為本文的重點，通過對時鐘信號建立數學模型，從理論上分析時鐘內部噪聲和相位瞬變產生時鐘定時信號損傷的原理，企圖尋找到更好地控制頻率漂移的方法。
  12. With the rapid development of information technology, all kinds of portable electronic products and personal digital assistants are coming forth, the information source of these products partly roots in newspapers and journals, if the literal data could be acquired in optical scan mode instead of traditional keyboard input mode, human hands will be further liberated. on the other hand, the digital signal processor ( dsp ) specially designed for high - speed digital signal processing is playing an important role in the digital field, and the dsp with high processing speed and excellent operation performance is particularly adapted to image processing and character recognition. in consequence of this status, making use of new technology, this thesis researches into miniature intelligent reading system based on dsp and then presents a system solution of it

    隨著信息化技術的飛速發展，各種便攜式電子產品和個人助理不斷涌現，這類產品的信息來源有很大一部分都是報紙、書刊等文字資料，如果以文字的光掃描輸入取代傳統鍵盤輸入將會進一步解放人的雙手；同時專門為高速數字信息處理而設計的數字信號處理器（ dsp ）也成為數字化領域的重要角色， dsp的高速度和良好的運算性能特別適合於圖像處理和文字識別。
  13. Timing & synchronization is a key technology in digital communication network. building integrated timing system ( bits in short ) equipment is the most common synchronization supply equipment in digital synchronization network, which also is the key equipment supplying telecommunication network signal

    定時與同步是數字通信網的一項關鍵技術，通信樓綜合定時系統（ buildingintegratedtimingsystem ，簡稱bits ）設備是數字同步網中最常見的同步供給設備，也是提供電信網同步信號的關鍵設備。
  14. In addition, this paper discusses the application of the parameter - induced stochastic resonance in the m - ary pam signal transmission, and explains the mechanism to stochastic resonance in a new view. we found that the single well is able to distinguish different signal levels, based on which the theory for m - ary pam signal transmission via parameter - induced stochastic resonance was briefly developed. the error code rate of m - ary pam signal was obtained

    此外，本文還初步探討了參數誘導的隨機共振在多進制數字調制信號傳輸中的應用，從不同的觀點解釋隨機共振形成的機理，充分認識到非線性系統單勢井的信號處理能力，並給出多進制信號誤碼率的理論公式，模擬實驗表明這個研究方向具有很好的研究前景。
  15. Frame structure for synchronous digital hierarchy signal

    同步數字體系信號的幀結構
  16. Basic multiplexing structure for synchronous digital hierarchy signals

    同步數字體系信號的基本復用結構
  17. A set of consecutive digit time slots in which the position of each digit time slot can be identified by reference to a frame alignment signal

    一組連續的數字時間片段，每一數字時間片段在組內的位置可參考幀同步信號來標識。
  18. Synchronization is the commander of every digital communication system, without it the system is unable to work orderly and correctly. a five - tuple of time - frequency diversity is adopted to guarantee that the synchronization signal be retrieved reliably in the receiver

    同步是任何數字通信系統有序工作的「指揮棒」 ，本研究採用5重時頻分集的方法，使得在接收端能夠可靠地恢復出系統工作所需要的同步信號。
  19. The system employs multicarrier modulation ( mcm ) technique as the modulation method, and linear frequency modulation ( lfm ) signal as the synchronization signal and digital signal processor ( dsp ) as the hardware ' s core chip

    該系統選用多載波調制技術進行調制，選用線性調頻信號為其同步信號，選擇數字信號處理器為硬體核心晶元。
  20. Take the hoc based blind modulation detection algorithm as an example, the relationship between the blind modulation detection algorithm and synchronization is investigated. an unproved detection algorithm robust to frequency offset is proposed which solves the problem caused by the error in carrier synchronization. how to synchronize a received signal with unknown modulation type is studied and a blind algorithm to estimate symbol timing of the signals with unknown modulation type is presented

    研究了載波同步和碼元定時同步與調制方式盲檢測演算法的關系；以自適應單載波中高階累積量調制方式盲檢測演算法為例，對于載波同步誤差引起的頻偏問題，提出一種基於頻偏穩健的mdpsk信號調制方式盲檢測演算法；對于未知調制方式信號的定時同步問題，提出一種盲定時估計演算法，該演算法可以估計mdpsk和mqam信號的定時同步信息，實現數字信號的同步分類；提出了一種基於調制方式盲檢測的自適應接收機結構，把調制方式盲檢測，信噪比估計和同步解調聯合起來進行，實現調制方式隨通道質量而自適應變化的信號的正確接收。
分享友人
分享到 Line

分享到臉書