數字成幀 的英文怎麼說

中文拼音 [shǔzìchéngzhèng]
數字成幀 英文
digital framing
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 成 : Ⅰ動詞1 （完成; 成功） accomplish; succeed 2 （成為; 變為） become; turn into 3 （成全） help comp...
  • 幀 : 量詞（幅, 用於字畫）
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  1. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  2. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  3. This painting involves fetching data from the frame buffer and converting that digital pixel data into a stream of analog signals that the monitor can understand

    這個過程包括從幀緩沖中取數據然後將數據沖數字信號轉換成模擬信號，傳送給顯示器。
  4. Image processing circuit made up of several following parts : the pretreatment of the video, a / d change, the frame memory, the track window and the digital signal proc

    圖像處理電路由以下幾部分組成:視頻預處理、模數轉換、幀存儲器、跟蹤窗口、數字信號處理器。
  5. 1 ) realization of software packet embedded in m - es and md - is respectively to accomplish main function of mdlp, including assignment of tei ( temporary equipment identifier ), establishment of multiple frame operation, framing, flow control and error - free transmission of packets, is detailed. 2 ) a test model is established to evaluate the robustness and stability of mdlp and verify the validity of software packets. 3 ) according to the design of radio modem construction used in m - es, the modules of interface between data terminal equipment and radio modem are achieved to enable transmission of short message and continuous pseudo - random bit stream via rs232 uart

    本文首先概述了蜂窩數字分組數據網的結構和空中協議，詳細分析了移動數據鏈路協議，並在此基礎上，重點敘述了以下方面的工作： 1 ）設計並完成了分別應用於m - es和md - is端無線控制器的兩套程序實現數據鏈路層的主要功能，包括分配臨時設備號、建立鏈路、組幀和面向連接的服務保證分組正確無誤地傳輸，並進行適當的流控； 2 ）建立測試模型測試移動數據鏈路協議的可靠性和穩定性，證明了程序包的效用； 3 ）根據cdpd系統無線數據機的軟硬體總體設計方案，完成了介面模塊，實現了rs232異步串口通信，使用戶可以根據需要發送短消息或連續的偽隨機比特流； 4 ）在tms320c54x的軟體、硬體模擬平臺上，建立了cdpd試驗模型，實現了cdpd系統的mdlp基本功能。
  6. Digital video watermarking is a powerful tool for video copyright protection and security authentication. video data is redundancy, so video watermark usually encounters synchronization attacks, such as frame dropping, cut - paste etc, how to improve synchronization attack - resistance of video watermarking has become an important research trend

    數字視頻水印是版權保護和安全認證的有力工具，而視頻的高冗餘性特徵使得視頻水印極易受到幀切除、剪切-復制等同步攻擊，如何提高視頻水印的同步魯棒性成為數字視頻水印的重要研究內容。
  7. When the egg - reached signal is sent to pc, through i / o card, the pc drives the video card to capture one frame picture to ram. after a series of mathematical analysis, the pc send the yolk color ' s or egg size ' s grading signals to outer signal delayed controller by i / o card again. last, the controller sends the delayed signals to outer execute equipment to finish classifying

    蛋已到達光室的控制信號由數字量i o卡輸入到計算機；計算機通過對埠的查詢獲知這一信號后立刻驅動圖像採集卡將當前光室中的一幀圖像採集到主機內存中，進行相應的計算分析后將光室中鴨蛋蛋芯顏色或大小分級信號再經由數字量輸入輸出卡，送至外部信號延時控制器；控制器將此信號延時後送至外部執行機構，完成分級動作。
  8. Because computing exactitude contrail is completed after the event by shooting range photic measure equipment, better quality track record to image collected by photoelectricity sensor become a very important work it exists the problem of data transmission rate low in the process of storing data to hd from high frame frequency and great array ccd camera

    由於靶場光測設備對目標精確軌跡計算的工作要在事後完成，因此對光電傳感器採集到的圖像數據高質量記錄就成為一項極其重要的工作。從電視測量系統的高幀頻、大陣列的數字ccd像機採集並存儲數據到硬盤的過程中，存在數據傳輸速率低不能滿足要求的問題。
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