數字邏輯電路 的英文怎麼說
中文拼音 [shǔzìluódiànlù]
數字邏輯電路
英文
dlc digital logic circuit- 數 : 數副詞(屢次) frequently; repeatedly
- 字 : Ⅰ名詞1 (文字) character; word 2 (字音) pronunciation 3 (字體) form of a written or printed ...
- 邏 : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
- 輯 : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
- 電 : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
- 路 : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
- 數字 : 1. (表示數目的文字; 表示數目的符號) figure; digit; numeral; character; numeric character 2. (數量) quantity; amount
- 邏輯 : logic
- 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
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By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure. as followed, this paper depicted design details of intelligent instrument " s hardware, it included the design of interface circuit, data commutations and digital logic of dsp, mcu, internet ' s chip and isp ' s apparatus etc., and have designed schematic map and circuit. so it accomplished the full design of hardware / software of the new type intelligent instrument
本文具體給出了新型智能儀器硬體結構及實現,描述了智能儀器硬體設計細節,包括數字信號處理器、單片機、 internet接入晶元、可編程數字/模擬器件等在新型智能儀器中的介面電路設計、數據通信設計和數字邏輯設計等,詳細地給出了設計原理圖和電路圖;給出了新型智能儀器的軟體設計細節,從而完成了新型智能儀器完整的軟硬體設計。After the selection is made, the designer modifies his system digital circuit requirements to match the characteristics of the selected logic family.
選擇好類型之後,設計人應該修改對系統數字電路的要求,以適應所選之邏輯電路參數。The results of simulation prove that the improved algorithms are feasible for evolving the digital combinational logic circuits and improve the evolvable efficiency and convergence performance
模擬實驗結果證明了改進演化演算法對于實現函數級數字組合邏輯電路的硬體演化是可行的,並且提高了演化演算法的演化效率和收斂性能。Evolvable algorithms are applied to functional digital combinational logic circuits with the structure of classicepglo chip of altera co. and the detailed analyses of typical examples are also given
結合altera公司classicep610晶元的結構,研究了將演化演算法應用於函數級數字組合邏輯電路的硬體演化,並且對典型實例進行了詳細分析。Main course : structure of network of structure of all of technology of principle of analysis of logic of technology of electron of circuit principle, imitate, number, number, computer, microcomputer, computer science department, computer, advanced language, assembly language, data, operating system
主要課程:電路原理、模擬電子技術、數字邏輯、數字分析、計算機原理、微型計算機技術、計算機系統結構、計算機網路、高級語言、匯編語言、數據結構、操作系統等。A practical digital logic electric circuit of phase failure and phase stagger protection for three phase asynchronous motors
一種實用的三相異步電動機斷相錯相保護數字邏輯電路In fact, we use the digital way directly to synthesize sine wave
摘要數字電路技術課程的知識難點是時序邏輯電路的設計。Digital circuit includes two kinds - the assembly logic circuit and the sequential logical circuit, the characteristic of the assembly logic circuit is that the output signal is only the function which enters the signal and has nothing to do with the entering state at any other moment, it has no function of memory
摘要數字電路分為組合邏輯電路和時序邏輯電路兩類,組合邏輯電路的特點是輸出信號只是該時的輸入信號的函數,與別時刻的輸入狀態無關,它是無記憶功能的。This paper describes the method of realizing the function for digital logic circuit by an designing software example with mcs 51 and vhdl
通過mcs 51匯編語言和vhdl的軟體設計實例,闡述了實現數字邏輯電路功能的方法The new design ing method of digital and logical circuit
數字邏輯電路設計新方法In the modulation / demodulation circuits, cpld is selected as platform of the digital logic part, which includes series - shunt / shunt - series transform, difference coding and sample verdict
調制/解調電路中,串並/並串變換、差分編/解碼和抽樣判決等數字邏輯部分是以cpld作為開發平臺,論文給出了實現上述功能的vhdl程序及模擬、測試結果。A method for analysis of digital logic circuit
一種分析數字邏輯電路的方法Thirdly, the paper researchs the application of single electron transistor and the synthesis theory of cicuit based on quantum dot cellular automata by synthesis example of quantum cellular neural network based on build schr ? dinger equation of coupling quantum dot. at last, the paper researchs digital integrated circuit design based on quantum dot cellular automata and design a 8 - bit quantum dot cellular adder by qcadsign based on a method of majority logic reducetion for quantum cellular automata, it prove this designer of 8 - bit quantum dot cellular adder is correctly
Dinger )方程為基礎的量子點細胞自動機電路綜合理論,本文以量子細胞神經網路為綜合實例,建立耦合量子點的薛定鄂( schr ? dinger )方程組,通過化簡得到類似細胞神經網路的非線性電路方程。最後研究了基於量子點細胞自動機數字集成電路設計,通過建立邏輯方程,簡化邏輯方程,並設計基於精簡qca擇多邏輯門8位加法器,並用qcadesign進行了模擬,實驗證明設計正確性。Semiconductor devices - integrated circuits - digital integrated circuits - blank detail specification for programmable logic devices
半導體器件.集成電路.數字集成電路.可編程序邏輯設備的空白詳細規范To reduce the size and increase the reliability of the control card, lattice company ? isplsi chip is used to realize the digital logic circuit. its insystem programmable ability makes it easy to realize the design of digital logic circuit
6軸伺服控制卡上,使用lattice公司的isplsi器件實現數字邏輯電路設計,降低了板卡的設計尺寸,增加了電路板的可靠性和設計靈活性。With the rapid development of semiconductor, digital integrated circuit ( p, memory, standard logic gates, etc. ) and advance computer technology, the various measuring instruments ( virtual instruments ) with the powerful function of pc are produced in different industrial and scientific research fields. as we all known, the traditional instruments are usually built with discrete components and small scale ics, the disadvantages are obvious in system design, debugging and maintenance
隨著半導體技術與數字集成電路(微處理器、存貯器以及標準邏輯門電路等)技術的迅速發展,特別是隨著計算機技術的發展,在工業生產和科學技術研究的各行各業中,人們利用pc機的強大處理功能代替傳統儀器的某些部件,開發出各種測量儀器(虛擬儀器) ,傳統儀器的數字邏輯部分多是採用分立集成電路( ic )組成,分立ic愈多,給系統的電路設計、調試及維護帶來諸多不便。Abstract : a new technology of frequency tracking and synchronizing is given in this paper at the first time. this technology is digital non - temporarystate frequency tracer, in which digital and logical circuit is adopted to accomplish frequency - tracking and synchronizing accurately. it has some advantages such as simple circuit, adjustable relationship of inpur and output, no temporart state procedure, so this technology has wide application foreground in electrical technology and modern communication field
文摘:提出一種新的頻率跟蹤技術? ?數字式無暫態頻率跟蹤器,該技術採用數字邏輯電路實現了頻率精確同步跟蹤,具有電路簡單、輸入輸出頻率關系可調、沒有暫態過程等優點,在電子技術和現代通信等科技領域具有廣泛的應用前景。Digit - logic circuit chip
數字邏輯電路晶元To achieve tuning the gain of the controller by software and digital logical circuits, this article took the first method for example and introduced the tuning process and tuning result in detail, meanwhile, it has also been validated by the experiments and matlab
一種是通過計算機軟體對控制器增益進行調節,另?種是運用數字邏輯電路來調節增益,以第一種方法為例,詳細的介紹了調節過程、調節結果,並用實驗和計算機模擬加以驗證。In this thesis, we would present theory research and its implementation about mpeg - 2 ts stream “ health ” check analyzer. a brief narration about the background of our research and its mean would be put in the beginning. and then we would analyze structure of ts stream and its definition in iso / iec 13818 - 1, data structure of system layer and mechanism of decode would be stressed in this section, later, we would introduce principles and methods of mal - function check in mpeg - 2 ts network, parameters being presented by etsi tr 101 290 would be emphasized in this part
本文將對mpeg - 2ts碼流「健康」檢測儀的理論研究和數字電路設計作出如下介紹:本課題研究的時代背景及研究現狀和意義; mpeg - 2ts碼流的數據結構,在iso / iec13818 - 1中的定義和描述,其系統層的數據結構及解碼機理; mpeg - 2ts碼流在網路中故障檢測的原理和方法, etsitr101290規定檢測參數分類; mpeg - 2ts碼流「健康」檢測儀實現的總體方案,基於fpga的數字邏輯電路實現方案總體模塊劃分,模塊劃分的依據,模塊實現功能;總體方案的具體實現,幾個重要參數如pcr間隔及精度檢測,快速crc檢測等的實現;設計實現的驗證方法,典型參數檢測實現的驗證模型及驗證結果。分享友人