數據緩沖器 的英文怎麼說

中文拼音 [shǔjùhuǎnchōngqì]
數據緩沖器 英文
data buffer dbuf
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 據 : 據Ⅰ動詞1 （占據） occupy; seize 2 （憑借; 依靠） rely on; depend on Ⅱ介詞（按照; 依據） according...
  • 緩 : Ⅰ形容詞1 （遲; 慢） slow; unhurried 2 （緩和; 不緊張） not tense; relaxed Ⅱ動詞1 （延緩; 推遲） d...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 數據 : data; record; information
  1. Through the implementing of kernel level file and cache mechanism at the client side, this newly proposed distributed network file system provides seamless network file access and reduces the performance decline caused by network transmission. utilizing the concept of logic block server, it provides the reliable data block storage and implements redundant storage capacity. utilizing the concept of the index server, it provide s the cost of the greatly for server and network during data access process and realizes the computing with balancing capacity

    在客戶端通過實現內核級文件的調用和緩沖機制，實現了文件的無縫網路存取，並減少由於網路傳輸帶來的性能下降的影響；利用邏輯塊服務器實現邏輯塊的冗餘存取，實現數據塊的安全存放；利用索引服務器進行負載均衡計算，實現資料存取的較低網路和服務器開銷；利用索引服務器實現服務器組的零管理，使該系統具有高效性、穩定性和可伸縮性。
  2. In the proposed method, the controller takes the buffer length as congestion indication, takes sources quality and bandwidth utility as object function so as to learn on line. as the controller outputs, the coding rate for input traffic sources and the corresponding user percentage are used to adjust the cells " arrival rate to the multiplexer buffer. compared with the previous method where cells " arrival rate is tuned only by the encoding rate and the encoding rates for all input traffic sources are regulated in a body, the proposed method guarantee that the quality of cells are optimal while cell loss rate is minimized, which means quality of service is guaranteed

    在該方法中，擁塞控制器以緩沖區大小信元作為擁塞指示，以信源質量和帶寬利用率作為目標函數進行在線學習，控制器輸出包括信源編碼率及其對應的用戶數在全部用戶中所佔的百分比，即根據信源編碼率及對應的用戶百分數調整信源輸入流，從而克服了以往擁塞控制方法中僅僅調整編碼率帶來的對所有信源進行整體調整的缺陷，使控制系統在信元損失率最小情況下確保信源輸入流質量最高，從而有效地利用了網路帶寬。
  3. A common data acquisition card can be used on laboratory virtual instrument engineering workbench through designing the external interface between labview and common date acquisition card on the software design ; used the idea of the double buffer and direct memory access, a real time data acquisition and logging about the succession, big capacitance leakage current is realized ; a digital filter is designed to filter high frequency signals

    在軟體設計上，設計了與普通數據採集卡的介面，實現了在labview環境中應用普通數據採集卡的功能；運用雙緩沖和內存直接映射的設計方法實現對連續、大容量泄漏電流信號的實時採集和存儲；設計了數字濾波器對採集后的原始數據濾去高頻干擾。
  4. An array of lasers fitted on the car bumpers, radar and global positioning systems feed data into the on - board computer to determine its location and position

    汽車緩沖器上被安裝了一排雷射燈，雷達和全球定位系統隨時將數據傳入車載計算機用以確定位置。
  5. The interface to an audio stream player passing audio data from specified buffers to the audio hardware

    介面至音頻流播放通過音頻數據來自指定緩沖器的音頻硬體
  6. The circuit design of data buffer based on 386dx

    處理器的數據緩沖器電路設計
  7. I ' ll discuss in later chapters a few techniques for accessing data buffers that originate in user mode

    在後面的章節中，我將討論一些關于訪問發生在用戶模式中的數據緩沖器的一些技巧。
  8. Moreover, by choosing different kinds of write - back strategy, log management system can cooperate with buffer management to implement commit delay and group commit

    日誌管理模塊還通過對日誌回寫策略的調整，配合數據緩沖器進行延遲提交，成組提交，從而達到提高系統效率的目的。
  9. I ' ve assumed here that elsewhere in your driver is a manifest constant named mydevice _ alignment that equals a power of 2 and represents the required alignment of your device ' s data buffers

    在這里我假設：在你的驅動的別的地方是一個明顯的叫做mydevice _ alignment的常量，它等價於2並且象徵你的設備的數據緩沖器請求的隊列。
  10. The evaluation method of element in state transition matrix is given when the wrong order of data packet is considered. considering the wrong order of data packets, the mathematic model of networked control systems with long time delay is developed. the sufficient and necessary conditions for stochastic stability of such networked control systems with long time delay are given

    分析了長時延網路控制系統的二階矩穩定性和隨機穩定性；針對網路傳輸中的數據包的時序錯亂問題，提出了第二緩沖器的方法；分析了網路誘導時延的markov特性，並給出了時延markov鏈的狀態轉移矩陣中元素的求取方法；建立了存在數據包時序錯亂時長時延ncs的數學模型，並給出了對應的長時延ncs隨機穩定的充分必要條件。
  11. Data buffer handler dbh

    數據緩沖處理器
  12. Then a non volatile cache is between the visual file system and the hard disk, then advance the speed of reading and writing little file in the network dedicated server

    使nvram卡作為一種介於vfs和硬盤之間的一種可掉電保存的數據緩沖，從而提高了網路專用服務器器上對小文件的讀寫速率。
  13. The hardware designing include the interface with engine controller, such as d / a conversion. we chose the ad75089 which was produced by ad corp. this is a parallel port digital to analog conversion, and i give the presentation about its structure and connection scheme. in order to resolve the contradiction between faster computation and slower display, a buffer storage also needed

    第二部分詳細陳述了高速數據傳輸卡的軟、硬體設計過程，硬體設計包括dsp與pci總線的介面、 dsp與外部控制器的介面、以及電路卡上的擴展數據緩沖區的設計，並使用專門的工具軟體protel繪出全部硬體電路的設計原理圖。
  14. It takes spatial data cache technology to establish the large capacity cache area for the backstage database, and to cushion customers ’ visiting request to the database, so as to reduce the frequency of the server access. in this way, the searching efficiency of the database system shall be improved

    利用空間數據緩存技術，為后臺數據庫設置大容量的緩存區，用於緩沖客戶對數據庫的訪問請求，減少對服務器訪問次數，從而提高數據庫系統的檢索效率。
  15. Provides methods for uploading and downloading files, sending and receiving streams, and sending a data buffer to the server and receiving a response

    Webclient提供上載和下載文件、發送和接收流以及將數據緩沖區發送到服務器並接收響應的方法。
  16. In a dpcx program, a type of form used to address data sent to the output full screen processing buffer

    在分散式處理控制執行程序（ dpcx ）中，一種用於對送到輸出全屏幕處理緩沖器的數據進行尋址的形式。
  17. When designing for the control software, author resolved the data exchange between two layers by using buffer technique which implements the efficient “ zero - copy ” method by passing buffer pointer, discussed the infection, derived from illogicality allocation algorithmic, and the way

    在編制控制軟體過程中，解決協議上下層之間的數據交換問題時，作者採用了緩沖區技術，即利用緩沖器的指針傳遞來實現高效率的「零拷貝」技術，並討論了不合理的分配演算法對緩沖器造成的影響和解決辦法。
  18. In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter

    在電路模塊分析中，重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等，並且給出了在硬體電路設計和調試過程中的問題與解決辦法。
  19. This protects the system ' s “ heaps ”, “ stacks ”, data and communications buffers from inadvertently running any executable code they might contain

    這也保障了系統的"垛" ， "棧" ，數據和通信緩沖器在不經意間運行任何可執行代碼，他們可能含有。
  20. Why would data or communications buffers ever contain executable code ?. . because so - called “ buffer overrun ” attacks are the predominant way internet - connected computers have historically been remotely hacked and compromised

    為什麼會數據或通信緩沖器以往任何時候都包含可執行代碼？ … … 。因為我們所謂的"緩沖區溢出"攻擊是最主要的方式與網際網路連接的電腦，在歷史上都曾遙控砍死，並作出妥協。
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