數據總線輸入 的英文怎麼說

中文拼音 [shǔjùzǒngxiànshūrù]
數據總線輸入 英文
dbin data bus in
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 據 : 據Ⅰ動詞1 （占據） occupy; seize 2 （憑借; 依靠） rely on; depend on Ⅱ介詞（按照; 依據） according...
  • 總 : Ⅰ動詞（總括; 匯集） assemble; gather; put together; sum up Ⅱ形容詞1 （全部的; 全面的） general; o...
  • 線 : 名詞1 （用絲、棉、金屬等製成的細長的東西） thread; string; wire 2 [數學] （一個點任意移動所構成的...
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 入 : Ⅰ動詞1 （進來或進去） enter 2 （參加） join; be admitted into; become a member of 3 （合乎） conf...
  • 數據 : data; record; information
  • 輸入 : 1 （從外部送到內部） import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. According to the requirements of disign, the system apply mcu at89c2051 to extend 32 keybords, and meantime the system can use battery which can be recharged to supply power. as a whole, the system charact eristic of inputting by keyboard and interacting by chinese characters can display and store spectrum data automatically and accomplish data handling. what ' s more. the system can communicate with other computers by the interface of rs - 232c

    同時，為了實現人機交互，系統採用at89c2051擴展了32鍵鍵盤。在系統的供電方面系統可採用充電電池供電。總體來說，系統採用按鍵輸入，漢字人機對話，能自動顯示和存儲測量譜線，並完成數據處理工作，除此之外，系統可通過rs - 232c與其它計算機聯機使用。
  2. Applying two perpendicular polarized light states and a no - light state to express information, this new theoretical system covers : a ) whole architecture constructed from light processing, light transmission, electric control and photoelectric input and output ; b ) various computing units mainly consist of liquid crystal element and polarimeter ; c ) light bus mainly consists of interlinkage optic valves ; d ) ternary memory formed from semiconductor memory ; e ) register formed from optic fiber ring ; and i ) huge - numeral management based on the new concept of calculating path and calculating channel

    這個理論包括：光處理、光傳送、電控制、綜合輸入輸出的總體結構；以液晶元件和偏振器為主的各類運算器結構；以互連光閥為主的光空間總線；以半導體存儲器為主的三值數據存儲器結構；以光纖環為主的寄存器結構；以算位、算道新概念為基礎的巨位數管理方案等。
  3. First, this paper gives a method, which is utilized by baseband system according to wcdma system capability requirements, using asic + dsp to realize raker, using dsp + dsp to realize symbol process. the hardware structure of asic + dsp and dsp + dsp is designed from the whole design view. then, the discussion is made of the main function module of ic2001 and dsp, hi module, dsp peripherals on chip such as hpi, edma and emif

    文章首先結合wcdma系統性能要求提出了基帶系統所採用的方案，由asic + dsp實現rake接收機功能和dsp + dsp實現符號級處理功能;然後從總體規劃的角度設計出asic + dsp和dsp + dsp系統硬體結構，對ic2001和dsp的主要功能模塊， hi模塊， dsp片上外設hpi口、 edma和emif總線作了分析，並結合基帶處理功能開發了系統驅動;最後由信號源發出測試數據進入系統，進行功能實現后輸出數據繪制出波形圖，對所設計的基帶系統驅動方案進行驗證分析。
  4. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  5. The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened

    模擬信號調理模塊對輸入的信號進行調理，以達到系統和模數轉換器（ adc ）采樣的要求; dsp作為系統的核心部件，外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元， dsp對實時數據進行處理，當報警發生時將實時數據通過以太網上傳給上位機。
  6. Firstly, the dissertation tells something about lonworks technology, the lontalk protocol, the peer - to - peer communicaton etc. secondly, it lucubrates s - 2000 control system based on lonworks, including the design method of the system, the key technology, the characteristic of the intelligent node, the i / o property, the structure of intelligent block, the neuron chip, the design of the data acquisition node and so on

    本文首先闡述了lonworks技術及其特點，總線系統所採用的lontalk協議， peer - to - peer對等通訊，基於lonworks總線網路通訊協議系統等。然後對基於lonworks總線的s - 2000控制系統進行深入研究，重點研究系統的設計方法和關鍵技術，智能節點的特點，輸入輸出特性及智能模塊分析， neuron晶元的分析研究，以及數據採集節點的設計，數據採集控制軟體，組態軟體的設計原理等方面。
  7. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  8. First the paper introduces the composition of vxi measurement system both hardware and software. second the paper introduces the amc2320 8 - channel parallel daq module, including hardware components, drive functions and means to develop application programs with them, the specifications such as precision

    本文介紹了vxi總線測試系統的軟硬體組成，簡要說明了amc2320八通道并行數據採集模塊的硬體組成和驅動函數，以及用戶如何利用廠家提供的驅動函數編寫自己的應用程序，重點是測試這個模塊的性能指標，包括精度、輸入信號的頻率范圍。
  9. Based on the natural conditions, land use and production situation and implementation of the valley harnessing measures in the anjiagou river basin, dingxi county, gansu province, in this study the land use types, spatial distribution mode of land use structure, costs of farming, forestry and animal husbandry and their economic returns are analyzed, the qualitative and quantitative maximum economic returns of agriculture and animal husbandry are lucubrated, and an optimized design of land use structure is carried out by using the linear programming method and developing a mathematic model under the restriction of land area, labor forces, livestock forces, social requirements and forage supply

    摘要根據甘肅定西安家溝流域自然條件、土地利用狀況、治理措施和生產狀況，通過對土地利用的類型、結構空間分佈模式以及人財物資源的輸入和輸出分析，以種植業和畜牧業總體最大純經濟效益最高為目標，從定性到定量，通過建立數學模型，在土地面積、勞動力、畜力、社會需求和飼料需求的約束之下，應用線性規劃方法進行土地利用結構優化設計，求解最優目標解，得出優化方案。
  10. The product has the following characters : all - purpose input, completed separated signal channels, collection of the signal data by scanning, the display technique of lcd big screen, flash memory ; capacious compatible floppy disk, 36 types of signals, multiple alarms, communication of rs232 / 485 and hart confered - link with a view to second generation technique of the field - bus. during the developing course, i used the method of reliability design to design hardware, and researched carefully the process of weak signal. pass to practice, the product has achieved all aim of the design

    系統在功能上實現了萬能輸入，信號通道之間的完全隔離，信號的掃描採集，大屏幕lcd顯示技術， flash存儲器進行數據存儲，大容量的具有兼容性的電子軟盤， 36種信號方式，多種報警方式， rs232 / 485通訊，以及著眼于下一代的現場總線技術的hart協議介面等。
  11. During the design of vxi - bus serial controller module, the functions of vxi - bus including time - sequence for vxi interface, resource management, interrupt process, bus arbitration, are accomplished. to advance the performance and stability, the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence, the uart, the parameterized baud generator and “ pipeling frame ”. the handle type of data transfer bus for vxi - bus is researched thoroughly, and the format of serial data transfer is designed

    在vxi總線串列控制器設計中，實現了vxi總線控制器的基本功能，包括vxi總線介面時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串列總線時序向vxi總線時序的轉換、通用異步收發器（ uart ） 、參數化波特率發生器、流水線結構等功能模塊;在設計中還深入研究了vxi總線數據傳輸的各種操作類型，制定了串列數據傳輸的編碼格式。
  12. A testbench program is edited to simulate the behavior of the fifo. after the software simulation is accomplished, a real hardware circuit is designed to multiplex two data channels ( 1553b data channel and 1394 data channel ) according to ccsds standard. during the experiment and hardware debugging, the output logic of the fpga is checked up

    設計中，用vhdl語言對高速復接器進行行為級建模，為了驗證這個模型，首先使用軟體進行模擬，通過編寫testbench程序模擬fifo的動作特點，對程序輸入信號進行模擬，在軟體邏輯模擬取得預期結果后，繼續設計硬體電路，設計出的實際電路實現了將來自兩個不同速率的信源數據（ 1394總線數據和1553b總線數據）復接成一路符合ccsds協議的位流業務數據。
  13. In the thesis, based on design and implementation of the two signal processing system of different requirement, multi - dsp processor structure, dsp - pci interface, system control logic, pci device driver program, user application program are researched. the main content is list as follows : 1 ) according to the lfmcw radar signal processing algorithm, a signal processing system based on pc104 - plus bus is developed

    本文通過對以上兩種雷達信號處理機的設計開發過程，研究了採用多片dsp信號處理器組建并行處理模塊實現信號處理演算法的方法，利用pci總線實現處理機數據傳輸介面，設備驅動程序和控制界面軟體開發，實現信號處理機數據傳輸控制等幾個方面的內容，主要工作如下: 1 ）針對線性調頻連續波雷達信號處理演算法，完成了基於pc104 - plus總線的嵌入式信號處理板的設計、製作以及調試。
  14. In this system, mean velocity pipe is applied to transform the air velocity signal into pressure difference signal, and then the pressure difference signal is input into pressure difference transmitter to realize the transform of the pressure difference signal from non - electricity signal to electric current, and through the resistance in the corresponding sampling circuit the electric current is transformed into voltage signal ; the thermocouple is used as the primary element to realize the transform from temperature signal to the voltage signal ; under the control of communication agreement module, diversified voltage signal is transported into computer by way of a / d conversion module, and then the monitoring software compiled beforehand is transferred to deal with all the voltage signals relatively, the result of which is conveyed to relative interface to display

    該裝置具有三個特點：一是採用表面式測溫方法，有效地減少了元件的維護與損耗；二是採用工業控制計算機及信息就地採集、數據總線傳輸的方式，充分利用計算機和數據自動採集方面的技術，實現各種參數的在線測量，監測指標全面，能與dcs系統聯用，具有技術先進性和一定的前瞻性；三是採用顯示器配工業觸摸屏的顯示方式，為現場運行人員提供了簡單、易學、方便的操作模式。本裝置自2001年8月投入運行以來，有效地幫助、指導運行人員進行燃燒調整，對于鍋爐和機組的安全、經濟運行發揮了重要作用。
  15. In this paper, the embedded technology, virtual instrument technology and can bus technology have been applied to design, and manufacture the onboard virtue instrument

    本文將嵌入式計算機技術，虛擬儀器技術和can總線數據傳輸技術引入到車載儀表中，設計、研製了嵌入式車載虛擬儀表。
  16. This is a big complicated monitoring and control system, the article only discusses a part of the units, includes : the components of neutral beam injection and the requirements for monitoring and control system, the argumentation and selection of control scheme, the research of data acquisition system based on pci bus, the design and realization of hardware and software of dac, the means of concentrated data storage and management, the communication program design of subsystem under different mode and protocol. the last part gives some experiment system running data

    這是一個大型復雜的監控系統，本文只就其中的幾個單元的設計與實現展開討論，主要內容包括：中性束注入裝置的組成及其對監控系統的要求，監控系統控制方案的論證和選擇，基於pci總線的小型數據採集系統的研製，多功能數據採集卡的硬體和軟體的設計與實現，集中式數據存儲與管理的方法及其實現，多功能子系統之間在不同通信方式、不同傳輸協議下的通信實現及其程序設計。
  17. It put out the system requirements from the whole structure, function structure, developing mode, user management, the design of software and database, safety design, system running efficiency, developing plan, etc. it put out the basic graphics operation, the module building and editing of the electrical network, the devices records and function management the devices operating management, the function producing the electrical subject chart, the outside interface function, the in - out function and webgis, etc. it discusses some advanced functions including the theory loss and practical loss computing of the distribution line, the reliability basic data producing and conversing tools, power cut management, the load supplying from other ways, the repairing management on user fault reports, th e new load installing assistant function, the management of hanging the cards and simulating operation, the monitonng and analyzing management of the running information, load monitoring and load density analyzing function and so on

    從系統總體結構，功能結構，開發模式，用戶管理，軟體和數據庫設計，安全性設計，系統運行效率，開發計劃等方面滿足了系統的總體要求；系統實現了基本圖形操作，電網建模與編輯，設備臺帳及運行管理，設備操作運行管理，電力專題圖生成，外部介面，輸入輸出， web - gis等基本功能;系統還具有配電線路理論線損計算及實際線損計算，可靠性基礎數據生成和數據轉換工具，停電管理，負荷轉供功能，用戶報修管理，用戶報裝輔助，掛牌管理和模擬操作，運行信息分析監控管理，負荷監控及負荷密度分析等高級功能:並能從運行方式，用戶權限，運行日誌三個方面闡述本系統的管理方式。系統總體結構合理，功能及介面齊全，配置擴展方便，可操作性強。
  18. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上，通過對原模塊缺陷的分析，採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度，將原模塊中的所有數字電路全部集成在fpga晶元中，這樣不僅能節約成本，還能提高電路的可靠性和測量精度;採用高速的數字信號處理器（ dsp ）取代原有的單片機作為協處理器，來接收vxi發來的各種命令，分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號，能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平，該比較電平值能夠根據實際需求進行設置，能增強模塊的使用靈活性。
  19. Then the embedded software and circuit design of terminal unit is described, including data collection, watermark sensor, interface design

    然後進行了嵌入式測控終端的軟硬體設計，包括：數據採集、土壤濕度的測量、輸入輸出介面及總線設計等等。
  20. The input votage range is 20mv 10v, frequency range is 0 ~ 20khz. the ad sampling rate is 100ksps, distinguishability is 16 bit. it uses two groups of ram to real - time store the collected data by time - sharing store and access technique, and uses a dsp chip to real - time analyse the frequency spectrum

    信號輸入電壓范圍20mv 10v （七檔量程可選） ，輸入頻率范圍0 ~ 20khz ， ad采樣率100ksps ，解析度16bit ，採用兩組ram存儲器分時存取的方法實時存儲採集數據，使用dsp晶元進行實時頻譜分析，通過pci總線與主機進行數據交換。
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