數模通道 的英文怎麼說

中文拼音 [shǔmótōngdào]
數模通道 英文
digilogue cha el
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 模 : 模名詞1. （模子） mould; pattern; matrix 2. （姓氏） a surname
  • 通 : 通量詞（用於動作）
  • 道 : Ⅰ名詞（道路） road; way; route; path 2 （水流通過的途徑） channel; course 3 （方向; 方法; 道理） ...
  • 通道 : thoroughfare; passageway; pass; enterclose; gallery; drong; tunnel; avenue; alure; way; row; key ...
  1. Makes general analysis and research on human visual system the characteristicness of human visual system is the process being considered firstly for every image process technology, include watermark technology, in order to join the characteristicness of hvs and the watermark technology together, this paper analyses and researches the hvs theoretics particularly firstly. it build the aesthesia models and the jnd models after discussing eyes " biology configuration particularly and expatiating eyes " aesthesia process. these works provide the foundation for the later research of watermark channel capacity and the watetmark embedding intensity. 2

    對人類視覺系統的特性進行了全面的分析和研究人類視覺系統的特性是任何圖像處理技術必須優先考慮的環節，數字水印技術也不例外，為了使人類視覺系統的特性和數字水印技術很好地結合，本文首先對人類視覺系統理論進行了全面細致的分析和研究，在詳細闡述了人眼的生理結構及人眼對顏色的感知過程的基礎上，建立了人眼的感知模型和人類視覺系統的jnd模型，這些工作為后來水印通道容量的研究、水印嵌入強度的確定等工作奠定了基礎。
  2. The new system consists of a single - chip computer system ( at89c51 + psd311 ) and alow power consumed analyzer by applying a new adc chip ads774, and a dead - time correcting circuit is designed to correct the collecting time

    本系統由單片微機系統（ at89c51 + psd311 ）組成多道緩存，由低功耗模數轉換器組成分析器，與微型計算機通過列印并行介面實現數據通訊，並含有死時間校正電路。
  3. Abstract : radiate thermometer uses a high definitive operation circuit in the modulation and linerization of weak optical signals. the theory of colorimetry was used in measuring the temperature. analogic channel and digital interfaces were added in order to expand the instrument. a kind of double channel ' s photocolorimeter including its hardware and software is introduced

    文摘:輻射測溫計採用高精度運算電路，對光弱信號進行調制和線性化處理，運用比色法原理對溫度進行檢測.為了便於儀器擴展，增加了模擬量輸出和數字介面，並對光纖式雙通道比色高溫儀的硬體與軟體的關鍵部分作了簡要介紹
  4. This thesis also discusses, from a mathematical perspective, the models of transmitters including unichannel, multichannel and channelized transmitters

    本文還總結分析了發射機數學模型，包括單通道、多通道以及通道化發射機。
  5. In this dissertation, we mainly study the efficient architecture of channelized digital receiver, discuss the particular realization approaches, then testify them with simulation

    本文主要研究了通道化數字接收機的高效結構，討論了具體實現方案並進行了模擬驗證。
  6. In this dissertation, the analog - digital channelized receiver is studied. the optimized system, spectrum reconstructing and accuracy signal frequency estimation algorithms are researched

    本文研究了模數混合通道化接收方案，著重研究其優化結構和關鍵技術以及線性調頻信號參數估計演算法。
  7. And we carry on carefully the theoretical research and systematic analysis of channelized receiver with poly - phase filters. in addition, we carry on simulations for channelization processing module

    針對基於多相濾波的數字通道化接收機，進行了仔細的理論研究和系統分析，並在此基礎上，對通道化處理部分進行了模擬實現。
  8. Based on upper study deeply the efficient digital channelized architectures based dft polyphase filter banks to deduce and establish several kinds channelized digital receiver mathematic models for real signal

    在此基礎上深入研究了基於多相dft濾波器組的數字通道化高效結構，推導並建立了實信號通道化數字接收機的多種數學模型。
  9. Hsupa ( high speed uplink packet access ) is the new technique of r6, first in this thesis, the hsupa physical layer is introduced in detail. then base on the physical layer technique characteristic, according to the 3gpp simulation requirements and system simulation requirements, the hsupa downlink and uplink can be constructed by using matlab. then the data channel and control channel can be simulated, so the channels performance can be realized, provide the results can be provided to the system simulation, these ground the future practical applications

    Hsupa （ highspeeduplinkpacketaccess ） ? ?高速上行分組接入就是r6版本中的新技術，本文首先詳細介紹了hsupa物理層的技術特徵，然後以其技術特點為依據，按照3gpp的模擬需求和系統級的模擬需求，使用matlab構建hsupa的上下行物理層鏈路，對其數據通道和控制通道進行模擬驗證，從而了解通道的性能，為系統模擬提供模擬數據，為以後的實際應用打下基礎，達到預研的目的。
  10. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  11. In this paper, using a top - down design scheme, the risc mcu ip core is divided into two parts : data path and control path. all the modules in the two parts are described by verilog hdl, a kind of hardware description language. the simulation and synthesis of the whole work are finished successfully with eda tools

    本文對pic16c6x單片機系統結構、指令系統和系統時序進行了分析，並且在此基礎上對精簡指令集mcuip核進行頂層功能和結構的定義與劃分，建立了一個可行有效的riscmcuip核模型本文將mcuip核劃分為數據通道與控制通道兩部分，採用asic設計中的高層次設計方法，使用硬體描述語言veriloghdl對這兩部分的各功能模塊進行了設計描述；利用多種eda工具對整個系統進行了模擬驗證與綜合。
  12. The paper puts emphasis on research and design of coprocessor algorithm, data path, control path and modules

    本文的重點是協處理器演算法、數據通道、控制通道及其模塊的設計與研究。
  13. With the use of new mcu p87c591, as the techiniques of serial communication and negative display of lcd, the dashboard has a very beautiful apearence and the system is simplified. not only the analogy signal and the pulse signal can be sampled into the instrument, but also the datum on the can - bus should be transferred into the system whit the connection to the in - vechile network. under the guindance of the idea of " informatic design ", the digital lcd dashboard system is developed, and the professional manufacturer of lcd display device is directed to develop and to design the special lcd module, by which the new lcd production is greatly optimized. all these intentions bing about a very well goal

    在研製數字液晶儀表過程中，應用了新型單片機p87c591 、串口驅動技術和負顯技術，使該數字液晶組合儀表結構簡單，視覺美觀，既可以通過模擬通道、數字通道測量車輛傳感器的信號，又具備接入車輛總線、從can總線上獲得相關數據的能力。在項目開發過程中，運用「信息化設計」的觀點開展液晶顯示模塊的開發和設計工作；並根據軟體工程的原則，優化了液晶模塊的電路設計，使該項產品的開發取得了好的效果。
  14. This article describes the plc ’ s using enviroment and the users ’ needs in details, and then tells the differences between the dplc and the troditional plc. it also describes how to decimation and compress the tele - voice, how to deal with the data tunnels, and the multiplex data through the the line which ’ s bandwidth is changeable between 10. 8bps and 28. 8kbps this project uses the programmable vopp chips, the cpld for bus controlling, the fpga and the mcu with high processing ability. all of these ensure the high ability to process the signals and the operations

    本文詳細介紹了高壓電力線載波機的使用環境和用戶需求，全數字電力載波機和傳統模擬載波的的差異;按電力調度的需求設計完整的兩路語音、兩路數據的電力線載波通訊機。詳細描述電話語音的采樣，壓縮;數據通道的處理;及在10 . 8kbps 28 . 8kbps可變線路速率通道上的數據復接處理。從實現方法上看，該項目採用專用可編程vopp語音處理晶元， cpld晶元做為總線控制，大規模fpga集成電路，高處理能力的mcu 。
  15. Digital channelized receiver is good at real - time signal processing, especially at improving ability of whole probability capturing as well as resolving the problem of channels ’ in - equilibrium of analog channelized receiver

    數字通道化接收機可以提高實時處理能力，特別是提高全概率截獲能力，並且可以有效地解決模擬通道化接收產生的通道不均衡的問題。
  16. The tapped delay model of the multi - path frequency selective fading channels as well as the diversity receiver technique is introduced, and the principles of rake receiver are described. then various downlink channel estimation techniques, such as simple averaging, wmsa and fbprelms are analysed in detail

    本文首先討論了移動通信通道的各種參數對通道估計的影響，介紹了頻率選擇性通道的抽頭延遲線模型和分集接收技術，在此基礎上闡述了rake接收機的原理。
  17. A data channel on which the information transmitted can take any value between the limits defined by the channel. voice - grade channels are analog channels

    一種數據通道，其傳輸的信息可取該通道規定界限內的任何值。話音通道就是模擬通道。
  18. This dissertation investigates primarily the channelized receiver ’ s application in electronic reconnaissance, and puts forward a project of the wideband signal reconstruction system including 4 - band efficient channelized receivers and a project which is 8 - band efficient digital channelized ifm receiver, then testifies them with simulation

    文中重點討論了通道化數字接收機在電子偵察中的應用，提出了基於數字通道化高效結構的4通道重建系統方案和8通道ifm接收機方案，並通過系統模擬論證了方案的正確性。
  19. 1. study of the clb bus protocol and the pvci protocol ; 2. the design of clb - pvci bridge architecture ; 3. the design of each functional module, include the state machine, the address decoding and peripheral ip selection module, datapath module

    Clb總線協議和pvci協議的研究； 2 clb - pvci橋總體結構的設計； 3各功能模塊的設計，包括狀態機、地址譯碼和外設ip選擇模塊、數據通道模塊； 4
  20. This design can provide a high - speed path to a set of sharc parallel array processor. between this parallel processor and an analog signal acquisition module, the designed system can realize real time transmission

    本設計的目的在於為一套sharc并行處理陣列機提供高速的數據通道，使其能與模擬信號採集模塊進行實時的數據傳輸。
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