時鐘同步模式 的英文怎麼說

中文拼音 [shízhōngtóngshì]
時鐘同步模式 英文
clock synchronization module
  • : shí]Ⅰ名1 (比較長的一段時間)time; times; days:當時at that time; in those days; 古時 ancient tim...
  • : Ⅰ名詞1 (用銅或鐵製成的響器) bell 2 (計時器) clock 3 (指鐘點、時間) time 4 (沒有把兒的杯子...
  • : Ⅰ名詞1 (步度; 腳步) pace; step 2 (階段) stage; step 3 (地步; 境地) condition; situation; st...
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 名詞1 (樣式) type; style 2 (格式) pattern; form 3 (儀式; 典禮) ceremony; ritual 4 (自然科...
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  • 模式 : model; mode; pattern; type; schema
  1. Clock recovery is an important and difficult part of tdm access, so the thesis will emphasize on it. and two methods of clock recovery are proposed in the thesis

    然後,本文對統計恢復法進行了分析,推導出了信號低頻抖動的域和頻域特性公,並利用matlab對低頻特性進行了擬分析。
  2. The serializer and deserializer moduls in the ftlvds chip are designed by the way of standard cell design approach. the paper emphatically discusses the tradeoff and the implementation of several clock synchronization modes and circuit structures, and makes a lot of verilog simulation and verification on the circuits designed

    串並塊串列化器和解串列器採用標準單元的方法設計,論文討論了對幾種時鐘同步模式以及串並轉換電路結構的權衡和實現,並對所設計的電路結構進行了verilog擬驗證。
  3. But to apply a synchronous mode it is possible only in case of presence of separate clockline for synchronization dac with transport

    但是應用候,只有在dac和轉盤使用各自的候才可以
  4. An idea is brought forth to design the total structure of the usb interface ip, the main control logic, the mcu interface ( the function is the same as the pdiusbd12 chip of the philips semiconductor ) and a dpll which is used to synchronize data and separate the clock. this paper also introduces packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding,

    提出設計了usb介面電路的整體構架,設計了usb的主要控制邏輯和與mcu的互連的介面(此介面與飛利普的usb介面晶元pdiusbd12兼容) ,也設計了一個數字鎖相環( dpll )來數據和分離,並對的識別、并行/串列轉換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。
  5. Second, this dissertation implements separately a mpeg - 2 video decoder and a dolby ac - 3 digital audio decoder based on software mode, and gives a audio & video synchronization algorithm based on audio - clock - benchmark in mpeg - 2 system decoder, whose feasibility and practicability have been proved by experimenting. it is an all - purpose algorithm, which can perform different decoder according to mpeg - 1 or mpeg - 2 system models, and can also be used for reference to the implementation of other multiplex stream decoders

    然後,論文實現了基於軟體方的mpeg - 2標準視頻及ac - 3格壓縮音頻的實解碼與回放,並依據mpeg - 2系統解碼型實現了一種基於音頻基準的mpeg解碼器的視音頻演算法,實驗證明該演算法可行、實用、通用性好,對符合mpeg - 1或mpeg - 2系統標準的視音頻解碼器均具適用性。
  6. Based on real time request of information, the solution of epa system is put forward which can settle real time communication on filed device layer network. the solution of epa system includes network communication model, communication service modes, real time schedule and clock synchronization

    通過分析現場設備層信息的實性要求,研究提出了epa系統應用於工業現場設備層的實通信解決方案,包括epa系統的網路通信型、通信服務方、實通信調度和
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