時鐘單位 的英文怎麼說

中文拼音 [shízhōngdānwèi]
時鐘單位 英文
clock unit
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 位 : Ⅰ名詞1 （所在或所佔的地方） place; location 2 （職位; 地位） position; post; status 3 （特指皇帝...
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  1. In trpsin tolerance assay. this virus could resist to 1 % trpsis at 37 in an hour. in acid tolerance assay, this virus was resistant to ph3. 0 and ph5. 0 at 37 in 2 hours, and the average infection litre of the virus decreased little. in heat assay, at 50, the virus was processed from 5 minutes to 150 minutes and at each condition the viral virulence reduced to some certain degree. among these conditions, when at 50 in 30 minutes. the average infection litre of this virus decreased over 2 tilre. and when al 50 in an hour, cpe of ihis virus disappeared. when time was set for an hour. but with processed in different temperature as 50 60 70, 80, the virus losl the multiplication capacity complelely. in biological assay, we selected different cell lines to cultivate this virus by laking advantage of possesional cells at that time in our laboratory. then we found that fcwf cell line was the most sensitive to dxmv and mdck was the second. with f81 cell line, after passaged for 12 times continuously with low concentration of fcs. the virus could produce cpe. however, with vero cell line. the virus could not procuce any cpe after many passages. the hemagglutination and lumadsorption reaction test proved that this virus had no any reaction to erythrocyte of pig, fowl and cavy. by neutrolizaion assay, dxmv could be identified as a kind of ccv

    理化學研究表明，該病毒為rna病毒，對氯仿、乙醚敏感；胰酶試驗中，經37 、 1小時處理的病毒，仍然能夠在貓源細胞fcwf細胞上生長，並且毒力基本保持不變；耐酸性試驗中，病毒分別在ph5 . 0和ph3 . 0經37作用2小時，毒力僅下降一個滴度；耐熱性試驗中，該病毒在恆定溫度50 ，設定不同時間，從5分鐘到150分鐘，毒力均有不同程度下降，其中， 50作用30分鐘，病毒平均滴度下降2個單位； 50 ， 60分鐘， cpe消失；恆定時間1小時，設定不同溫度（ 50 - 60 - 70 - 80 ） ，病毒在細胞上完全喪失增殖能力， cpe消失。生物學試驗，利用實驗室現有條件，選擇不同的細胞系對該病毒進行培養，發現該病毒對貓源細胞fcwf最敏感； mdck細胞次之； f81細胞經多次傳代，亦可出現cpe ；而vero細胞則不敏感。血凝試驗表明，該病毒對豬、雞、人及豚鼠的紅細胞均無血凝性。
  2. The second parameter specifies the rate of the pixel clock in megahertz

    第2個參數指定的是像素時鐘頻率（單位為mhz ） 。
  3. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  4. Abstract : a new clock - driven eco placement algorithm is presented for standard - cell layout design based on the table - lookup delay model. it considers useful clock skew information in the placement stage. it also modifies the positions of cells locally to make better preparation for the clock routing. experimental results show that with little influence to other circuit performance, the algorithm can improve permissible skew range distribution evidently

    文摘:提出了一種新的時鐘性能驅動的增量式布局演算法，它針對目前工業界較為流行的標準單元布局，應用查找表模型來計算延遲.由於在布局階段較早地考慮到時鐘信息，可以通過調整單元位置，更有利於后續的有用偏差時鐘布線和偏差優化問題.來自於工業界的測試用例結果表明，該演算法可以有效地改善合理偏差范圍的分佈，而對電路的其它性能影響很小
  5. The nco limits are measured via the 30 - minute equivalent level in unit of a - weighted decibels ( db ( a ) ), which is a commonly used international standard

    該條例所訂的聲量上限是以每三十分鐘時段內的平均噪音能量水平量度，以a加權分貝值為單位（分貝（ a ） ） ，該準則為國際普遍採用的標準。
  6. Specifies the cookie expiration time interval, in minutes

    指定cookie過期時間間隔（以分鐘為單位） 。
  7. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  8. And a kind of 16 - step automatic selective programmable amplifying circuit is designed in volume resistivity measuring circuit, so as to handle sampling little and broad signal. the control and disposal system with the core of microchip at89c55wd is analyzed on chapter 4. main function unit such as the interface circuit of lcd display and keyboard, the interface circuit of micro - printer, real time clock ds12c887, and hardware anti - jamming technique are discussed

    本文還設計了以at89c55wd單片機為核心的控制處理系統的外圍介面電路及其軟體，對主要功能部分進行了分析，主要包括：鍵盤液晶顯示介面及界面設計、微型印表機介面、實時日歷時鐘晶元ds12c887 、單片機與單片機及單片機與上位機的通信設計以及控制系統硬體抗干擾措施等。
  9. Currency exchange rate international country codes the rules of custom zip code e - calendar world clock measurement conversion

    貨幣匯率國家代碼海關法規郵編區號電子日歷世界時鐘單位換算
  10. We present two different frameworks to analyzing the high frequency time series : first, regularly spaced sampled observations, which is sampled with interval of one hour, one minute even one second ; secondly, the irregularly spaced data, such as transaction by transaction data 。 the main work and innovations of the dissertation include : 1. through empirical research of high - frequency time series of shanghai composite index, the paper researches the different statistical properties on different frequency

    高頻時間序列的分析與建模是金融計量學的一個全新研究領域。金融市場中高頻時間序列分為兩類:一類是采樣間隔相等的數據，比如一小時、十分鐘、五分鐘、甚至是以秒為單位採集的按時間先後排列的等時間間隔的數據;另一類是指對交易過程實時採集的數據，也就是每筆交易的數據（顯然是不等間隔的數據） 。
  11. In addition, an experimental system using c language is established, including modules such as representation of waveform polynomial, decision of path senstization, delay computing, clocking based on single - period sensitization, clocking based on multi - period sensitization, test generation considering noise and transformation from bit - level waveform polynomial to word - level polynomial model. they respectively used to test models and techniques proposed in this paper

    另外， :基於c語言本人設計開發了一個實驗軟體系統，該系統包括波形多j一貞式表示模塊、敏化通路判定模塊、延時計算模塊、單周期敏化的最小時鐘周期精確確定模塊、多周期敏化的最小時鐘周期確定方法模塊、考慮噪聲的測試生成模塊和位級波形多項式描述轉化成字級多項式描述模塊，分別用於對本文各章中提出的自動化設計的模型和方法進行實驗驗證。
  12. When a user buys additional parking time from an epm, if the residual time of the lapsing parking - time unit is less than 13 minutes, such residual time is non - cumulative. i. e. the residual time of the lapsing parking - time unit will be superseded by just a full 15 - minute parking time unit in the first re - purchase

    當使用者在電子泊車咪表補購泊車時間時，倘若扣除中泊車時間單位的剩餘時間少於十三分鐘則剩餘時間不能累積計算，首次補購的泊時間只會由一個完整的十五分鐘泊車時間單位取代。
  13. Pacific place is located in admiralty and is actually an integrated complex. beside a 710, 000 sq. ft. shopping mall with famous boutiques, department stores, cinema, food court and restaurants, pacific place also has three 5 - star hotels, a serviced apartments building, a conference centre and two office towers

    位於金鐘的太古廣場並不是一個露天廣場，亦非普通的一個購物中心，而是一個大型的商業發展組合，除了有一個佔地達710 ， 000平方尺、集時尚店鋪、百貨公司、戲院、美食廣場和各式食肆的商場外，還設有三間五星級酒店、一幢酒店式住宅單位、以及兩幢商業大廈，對外來的商務旅客照顧周到。
  14. Have dissatisfaction the female worker of baby of 1 one full year of life, its are in an unit to ought to give its twice lactation time inside every work time, every time 30 minutes

    有不滿1周歲嬰兒的女職工，其所在單位應當在每班勞動時間內給予其兩次哺乳時間，每次30分鐘。
  15. Sets the time interval in minutes between autosaves

    設置autosave的時間間隔（以分鐘為單位） 。
  16. To discourage long - term parking at on - street metered parking spaces. electronic parking meters epms sell parking time in 15 - minute unit parking time unit

    為了令設有咪表的路旁停車位不會遭長時間佔用，電子泊車咪表售賣的泊車時間以十五分鐘為一個單位
  17. The optical interface board is crucial in sdh system, and the frequency synthesizer unit is especially important for the design of the board, so how to design an excellent optical interface board ( ol1zc8 ), which is in zxsm - 2510 project, is discussed in this dissertation

    Sdh設備研發中，光介面板的地位舉足輕重。光介面板設計中，頻率合成單元尤其關鍵，穩定可靠的時鐘信號是系統正常工作的前提。本論文依託中興通訊有限公司zxsm - 2510項目，項目的任務是設計性能優越的光介面板（命名為ol1zc8 ） 。
  18. Indicates the amount of time clock time in milliseconds, as returned by the

    函數返回的以毫秒為單位的時鐘時間） 。
  19. Then, memory cell array and some parts of peripheral circuits used in sram, for example, sense amplifyier and adderss decoder, are designed and verifyied by simulation. furthermore, some novel methods, such as clocked hierarchical word decoding structure, multi - stage sense amplifyier, common data line and data bus equlibruim technology has been applied in the design of 128kbit and imbit sram. what ' s more, we have studied compiler technology applied in the designing course of a imbit full cmos sram from the pointview of methology

    然後對sram的存儲單元電路以及外圍電路中的靈敏放大器和地址譯碼器進行了設計和模擬，在此基礎上，以128kb和1mb全cmossram設計為例，從方法學角度對同步sram設計中的帶時鐘分等級字線譯碼，多級靈敏放大和位線及總線平衡等技術進行了研究，並給出了相應的compiler演算法。
  20. Function the caller specified to complete the binding operation

    函數返回的以毫秒為單位的時鐘時間） 。
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