時鐘步率 的英文怎麼說

中文拼音 [shízhōngbùlǜ]
時鐘步率 英文
clock rate
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 步 : Ⅰ名詞1 （步度; 腳步） pace; step 2 （階段） stage; step 3 （地步; 境地） condition; situation; st...
  • 率 : 率名詞（比值） rate; ratio; proportion
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  1. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「時鐘」概念不是指日常生活中使用的鐘表，而是由產生基準頻率的信號發生器（如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等）中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備，它提供用在通信系統中控制某些功能的定時的時間基準設備，時鐘提供的信號稱為基準信號、定時信號或同步信號。
  2. Bits supplies the synchronous timing signal to these equipments inside the telecommunicationt building, such as dps, atm, no. 7, dxc, tm & adm in sdh, don and in etc. the related techniques are involved in the content of synchronization ne twork, timing distribution, the timing signal transportations x impairments etc. the second chapter tells the structure and the function of the building integrated timing system. the third chapter summarizes the digital synchronization network techniques, which emphasizes the basic concept of synchronization networks analyzes the necessity of building the synchronization network and introduces all kinds of synchronization methods. the fourth chapter represents the transportation of the synchronization signal

    本文第二章講述了通信樓綜合定時系統的構成及作用：第三章概述了數字同步網技術，著重描述了同步網的基本概念，分析了建立同步網的必要性，講述了各種同步方法；第四章闡述了同步定時信號的傳輸；第五章介紹了bits設備所支持的同步狀態消息；第六章、第七章為本文的重點，通過對時鐘信號建立數學模型，從理論上分析時鐘內部噪聲和相位瞬變產生時鐘定時信號損傷的原理，企圖尋找到更好地控制頻率漂移的方法。
  3. The article also includes the work as follows : 1. finished designing the hardware collective circuit and its controlling program, and using the dissynchronous fifo technique and independent clock circuit to solve the problem of high - accuracy regular - frequency sampling and the match system speed

    論文還完成了以下工作： 1設計現場診斷儀的硬體採集電路及相應控製程序。應用異步fifo技術和獨立時鐘電路，解決了高精度定頻率采樣以及系統速度匹配問題。
  4. As the semiconductor process technology steps into the deep sub - micro scale, the increasing number of transistors on single chip is making the digital system ever more complicated, and the clock frequency has already achieved the level of kilomega hz

    隨著半導體工藝水平步入深亞微米階段，單個晶元上的晶體管數越來越多，現代數字系統變得越來越復雜，時鐘頻率也己經能達到千兆赫茲以上。
  5. The 33220a external frequency reference lets you synchronize to an external 10 mhz clock, to another 33220a, or to an agilent 33250a. phase adjustments can be made from the front panel or via a computer

    33220a外部頻率基準使您能同步于外部10mhz時鐘另一臺33220a ，或agilent33250a .相位調整可從前面板或通過
  6. So exercise efficiently ? two short, very intense ( relative to your level of fitness ) training sessions weekly, like a 15 - minute fast run / walk or fast cycling sprint intervals, and two moderately long, moderately intense sessions ( 30 - 45 minutes ) of strong walking, cycling, or yoga, with one long day ( 60 - 90 minutes ) of a moderately paced walk / hike

    因此鍛煉有效率，每周兩次短時強度訓練（跟你的健身水平有關） ，如1個15分鐘快跑/步行或快騎車間隔疾跑，及2個合適時間，合適強度（ 30 ? 40分鐘）的強步行、騎車、瑜珈，及1個長時間（ 60 ? 90分鐘）合適速度的步行/徒步。
  7. Chapter three provides synchronization algorithms in dvb - t cofdm receiver, including symbol timing recovery, carrier frequency error estimation and sampling timing recovery. chapter four introduces some channel estimation algorithms based on interpolation in dvb - t receiver. five estimators are compared, in terms of mean - squared error both in rayleigh channel and ricean channel

    第三章首先討論了由於載波頻率偏差、符號定時偏差和采樣定時偏差對ofdm系統所造成的影響和干擾，然後針對dvb - t系統的cofdm接收機方案，分別給出了符號定時同步、頻率同步以及采樣鐘同步的實現演算法，並對它們的性能進行了分析模擬。
  8. In this paper, the method of in - bore abnormal phenomenon remote detecting is presented. considering of the multi - channel transient signals automatic acquisition, a project of pcm signal hardwire transmission data automatic acquire system is put forward. in this system, a pcm demodulate board is designed, it can decode the pcm code string which contain the information of the multi - channel transient signals, it also can catch the useful data automatically, and transmit these data to upper pc by rs485

    在該系統中，為了能夠解調出包含多路動態信號數據的高碼速率pcm信號，設計並製作了一種適用的pcm解調板，能夠從pcm碼流中恢復出位時鐘信號，從而與發送端保持位同步和幀同步，從而對pcm碼流可靠地解調、緩存，並能根據計算機設定的觸發條件自動地捕獲多路信號的有效段，然後利用rs485總線將這些數據可靠地遠傳至計算機以供顯示、分析和保存。
  9. A multiple - stage dynamic phase adjustment method between source synchronization driving clock and date is proposed ; it fits different operation frequencies and improves the system stability 6

    提出了一種源同步時鐘與數據相位的多級動態調節技術，從而適應不同的時鐘工作頻率，增加了系統的穩定性。
  10. And software method can resolve d channel ' s work for its less data communication ; 3 ) cpu 80c152 is synchronized with mc145572 by a simple synchronous circuit, avoiding the complex fpga interface circuit ; 4 ) data transmission use dma, which reduces the delay of data transmission and cpu occupying ; 5 ) 8bit software look - up table method can achieve 16bit crc quickly, which reduces the resource of both hardware and software

    對通信數據量相對小的d通道，採用軟體實現裝幀與解幀。第三，採用結構簡單的外部同步時鐘電路實現80c152和接入晶元mc145572的同步傳輸，巧妙地避開了復雜的fpga介面電路。第四，利用dma技術完成數據快速收發，降低了數據傳輸時延及cpu佔用率。
  11. System clock provides several synchronism clocks for every sub - circuit. reset circuit assumes that digital circuits have an initial state and self start

    系統時鐘電路分出多個同步頻率，以提供不同數字子電路的同步時鐘。
  12. The conventional ways has low efficiency, which result in the application of overlap grid in moving - grid problem, which need re - disposes the interpolating connection in every step in time direction, is very difficult considering the computational efficiency. aim at the above problem in application of overlap grid, this paper using an new manner rooting in analysissitus to put forward a “ method of distinguishing points of intersection ” and develop corresponding computational soft, which could realize the automatic and shape - independent pre - disposal process for overlap grid. to deal with the problem of low efficiency for pre - disposal process in moving - grid, this paper bring forward the “ mosaic ” method and adt method which based on the huge memory of modern computer

    對于重疊網格在動網格應用中的計算效率問題，本文通過進一步研究插值信息的高速查詢方法，提出不同於傳統演算法思路，以現代計算機大內存為基礎，用計算機物理內存空間換計算時間的」 mosaic 」方法以及應用基於二叉樹數據結構的adt （ alternatingdigitaltree ）方法兩類方法，成功的將原處理時間提高了兩個數量級? ?即將網格規模在百萬量級的重疊網格預處理時間從傳統方法的耗時30 60分鐘提高到幾十秒鐘，從而成功解決了這一問題。
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