時鐘驅動晶元 的英文怎麼說

中文拼音 [shízhōngqūdòngjīngyuán]
時鐘驅動晶元 英文
clock driver chip
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 驅 : 動詞1. （趕） drive （a horse, car, etc. ） 2. （快跑） run quickly 3. （趕走） expel; disperse
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  • 驅動 : [機械工程] drive; prime mover
  1. Adopts vdsm process technology however two outstanding problems are faced to ic layout design when the feature size reaches to 0. 18 m or lower : 1. timing convergence problem seriously affects the circuits schedule, and the interconnect - delay has exceeded more than 70 % of the total circuits ’ delay. 2. si problem, usually it consists two aspects of ir - drop and crosstalk. these problems often affect the chip function after tapout

    本篇論文就是針對超深亞微米階段soc晶元後端設計所面臨的挑戰，提出了運用連續收斂的布局布線策略，尤其是虛擬原型的設計理論，來快速驗證布局，進而提高布線的成功率，並且提出了一種改進的布局評估模型，提高對soc晶元預測布線的準確度;同時，對于時鐘驅動元件選擇，文中提出了一種基於正態分佈模型來達到更有效的選取。
  2. If the chip remains sending state, it will take the data spread spectrum and modu - late, then sent forth by ad9768. the chip can be controlled throug h writing data in the interior 87 registers. secondly, this paper designed control system of twice civil air defense alarm system. because the scm " s port number was limited and port driving power is feebleness, this design realizes nixie tube ' s display drive with keyboard management chip max7219 and realizes true time display with ds1302, which can economize scm i / o port and make circuit connection simplicity

    通過對其內部87個寄存器寫入數據可對其進行控制。其次，本文對二次人防警報系統控制系統進行設計，針對單片機埠數目有限、埠驅動能力較弱等問題，使用鍵盤管理晶元max7219實現數碼管顯示驅動，用ds1302實現真時鐘顯示，節省了單片機i / o口，電路連接簡單。
  3. Thus, in the days when computing was still so primitive that people thought that digital watches were a neat idea, it was cmos chips that powered them

    因此，當計算還很原始時，人們想出數字鐘表來就是很好的一種思路，現在是cmos晶元來驅動。
  4. The design of this asic ( application specific integrated circuit ) is more advanced in power consumption, clock & calendar circuit and reset circuit making it more competitive than similar domestic products

    該驅動電路asic的設計在功耗、時鐘日歷電路、復位電路等方面較國內同類產品有明顯改進，使得該晶元在市場競爭上將具有較大優勢。
  5. The software can work successfully under 50mhz clock in simulation. at last this thesis gives some advices about the design of the oled ' s structure and the debugging scheme of the oled ' s driver

    綜合交流驅動和灰度移位調制輸出的設計思路，最後實現了可調脈寬灰度移位調制交流驅動晶元軟體的設計，在高達50mhz的時鐘下，模擬波形工作正常。
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