時頻基準 的英文怎麼說

中文拼音 [shíbīnjīzhǔn]
時頻基準 英文
time and frequency standards
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 頻 : Ⅰ形容詞（次數多） frequent Ⅱ副詞（屢次） frequently; repeatedly Ⅲ名詞1 [物理學] （物體每秒鐘振動...
  • 準 : Ⅰ名詞1 （標準） standard; guideline; criterion; norm 2 （目標） aim; target Ⅱ動詞1 （依據; 依照）...
  1. This is the basis for the well-known cesium clock, presently the standard of frequency and time.

    這就是眾所周知的銫原子鐘的基礎，它是目前的頻率和時間基準。
  2. In the sub block circuit design, the contents that the author had introduced include : the principle of band gap voltage reference and the design technique in low power supply ; the analysis of spike pulse noise rejection, frequency divider and dead time in oscillator and control circuit ; the selection of the width and length ratio of four switches and 2x / 1x mode change point in driver and mode selection circuits

    在子電路設計中，作者比較深入分析的內容有:基準電路的原理及低電源電壓下基準電路的設計;振蕩器和控制電路中尖峰脈沖噪聲抑制、兩分頻電路及死區時間設定;驅動及模式選擇電路中開關管的寬長比的選擇及模式轉換點的設計。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. The 33250a tcxo timebase gives you frequency accuracy of 1 ppm for your most demanding applications

    33250a tcxo時基可達到1ppm頻率準確度，從而適應有最嚴格要求的應用
  5. A counter with timing fiducial oscillator acts as a frequency multiplier, and the count value in the prior period is taken as the reference for the current period to give the decimal part of a signal period

    該方法利用帶基準時基的數字計數器實現周期內線性細分，當前周期信號將前一整周期的倍頻數作為參考構成信號周期的小數部分。
  6. In this dissertation, we studied the tcra1101plus total station position system, which introduced the principle and characters of the instrument ' s closed loop tracking system. also we explained the cause of prism ' s position error and brought forward mathematic model to correct, moreover, the good results has been drawn form the expenriments. the kinetic survey system have been realized, which the sampling rate attain more than 5hz and the position precision can be less than 2mm on condition that targeted - point moving slowly at the velocity below 2cm / s. having finished the survey system to examine whether the fine - tuning stewart platform in good status, we have finished mensurating the position reference of the fine - tuning stewart platform and the offset of the prism

    在此基礎上研製了多臺儀器在線控制高頻采樣動態跟蹤測量系統，采樣率大於5hz ，在跟蹤小於2cm / s低速運動目標時，測量精度好於2mm ；完成對饋源二次精調系統的檢測，包括對二次精調平臺位置基準的標定和觀測棱鏡偏心差的測定；設計不同動態測量實驗，對全站儀動態跟蹤的誤差來源和特點進行了分析；從實驗角度，對全站儀的測量時滯及其穩定性進行了測試分析，給出了定量的結果；比較了全站儀和計算機的內部時間系統，發現兩者存在較大差異。
  7. Analyzing the characteristics of the time - series data of horizontal displacement from the continuous gps network in time and frequency domain, the similarity transformation is conducted in order to give prominence to the local deformation by selecting a few stations in the eastern china

    摘要對gps基準站連續觀測水平位移時間序列數據的時頻特徵進行了分析，為了突出局部變化的信息，在中國大陸東部選取一組參考點進行相似變換。
  8. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「時鐘」概念不是指日常生活中使用的鐘表，而是由產生基準頻率的信號發生器（如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等）中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備，它提供用在通信系統中控制某些功能的定時的時間基準設備，時鐘提供的信號稱為基準信號、定時信號或同步信號。
  9. Time and frequency standards

    時間和頻率基準
  10. Single frequency source is usually used as local oscillator in communication system and radar system, also as a reference clock in digital circuits, so it is a extensive - applied technique

    固定頻率源可以在在通訊系統和雷達系統中作為本機振蕩器，也可以作為數字電路的基準時鐘信號，因此得到了廣泛的應用。
  11. The topologies family include single four - quadrant power switch mode, push - pull mode, half - bridge mode, and full - bridge mode circuits. taking full - bridge mode circuit as an example, the operational mode, steady principles, transient voltage feedback control strategy of the converter are investigated. the output characteristic curve, the design for the key circuit parameters and the reference sinusoidal circuit which is synchronous with the signal of n or 1 / n times line voltage frequency are given

    該電路拓撲族包括單四象限功率開關式、推挽式、半橋式、全橋式電路，以全橋式電路為例分析研究了這類換器工作模式、穩態原理與電壓瞬時值反饋控制策略，給出了變換器的外特性曲線、關鍵電路參數、與電網電壓n倍頻或n分頻信號同步的基準正弦電路的設計。
  12. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究，分析了這些技術的工作原理和優缺點，在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時，為了使輸入共模電壓范圍達到軌至軌，不是採用傳統的差動輸入結構，而是採用了nmos管和pmos管並聯的互補差動輸入對結構，並採用成比例的電流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中，電流鏡負載並不是採用傳統的標準共源共柵結構，而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設計時，為了提高效率，採用了推挽共源級放大器作為輸出級，輸出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計，採用了帶電流鏡負載的差分放大器設計了一個基準電流源，給運放提供穩定的偏置電流和偏置電壓，保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  13. In this circuit, reference current sources are used to charge and discharge capacitors. this oscillator ’ s output is very ideal through control circuit under 5. 7v reference voltage, and oscillator ’ s frequency and duty - cycle could be adjusted if reference current source or capacitors in the circuit was adjusted. and the changes of temperature and voltage affect stabilize of the frequency little

    此電路利用系統內部基準源產生的電流信號來對電容進行充放電，然後經過控制電路作用后，產生的輸出振蕩波形的上升時間和下降時間非常小，更接近理想矩形波形;通過調節基準源電流信號或者電容值大小，可調節振蕩波形的頻率和占空比，同時溫度和電壓的變化對振蕩器輸出波形頻率穩定度的影響很小。
  14. Thus, it is difficult to find the voltage reference for the harmonic analysis. since acem are always operated near to the synchronous speed, the frequency of the excited voltage is very low, even to zero. therefore, this is the power harmonic suppression study of a complicated power supply system, in which the about harmonic general theories and methods are all inapplicable

    現代交流勵磁電機（ acem ）採用電力電子變流器作為勵磁裝置，其勵磁電壓諧波含量豐富，難于獲得諧波分析所需的電壓基準，同時交流勵磁電機經常工作在同步轉速附近，致使勵磁電壓頻率極低甚至為直流，通常的諧波檢測方法和理論都無法適用，因而這是一種目前尚未深入探討過的復雜供用電系統電力諧波抑制問題的研究。
  15. In its digital processing circuit, clock chip with high precision and temperature compensation is uesd as reference clock. high frequency reversible counter is used to count trimmed impulse signal forward or backward and two pathes saw signals are selected timely by multichannel selector

    數字信號處理電路採用高精度、具有溫度補償的時鐘晶元作為基準時鐘，採用高頻可逆計數器對整形后的脈沖信號進行正向或逆向計數，採用高性能的多路選擇器控制兩路saw信號的定時選擇。
  16. The 33220a external frequency reference lets you synchronize to an external 10 mhz clock, to another 33220a, or to an agilent 33250a. phase adjustments can be made from the front panel or via a computer

    33220a外部頻率基準使您能同步于外部10mhz時鐘另一臺33220a ，或agilent33250a .相位調整可從前面板或通過
  17. This paper analyses crystal oscillator ’ s character and technique targets, and the changes of these technique targets effect the time of crystal oscillator gives the error mode of crystal oscillator time, by discussing gps system and time service theory, we analyze random character of gps second pulse error. we combine long - time stability of receiver ’ s output signal and short - term stability

    該系統成功地應用於寬頻帶地震記錄儀中，使地震數據記錄的時基精度達到微秒級，可以解決大范圍的地震儀布設應用時的授時和空間定位（經度、緯度、海拔）問題，為地震數據記錄、分析工作提供了與國際標準時間同步的時間基準。
  18. The radio frequency receiver supports interface for instrument and base station and air interface for mobile station, and it takes the task of magnifying low noise and down - convert and digital baseband processor filtering and magnifying intermediate frequency to reverse link signal. the digital baseband processor samples the received signal after down - convert radio frequency signal to intermediate frequency signal and processes other processing and supports interfaces to computer, next sends data to computer. the gps receiver supports interface for instrument and gps system, and receives gps system signal, next it demodulates the correlative information and sends out benchmark clock signal we need

    射頻接收部分主要為儀器和基站、移動臺提供空中介面，其主要任務是在反向鏈路上對接收到的射頻調制信號進行低噪聲放大、射頻下變頻變換、中頻濾波放大等;數字基帶部分為對接收信號變頻為中頻后進行a / d采樣，以及其他的rsp處理並和計算機提供介面，將數據送至計算機進行后臺處理、顯示等; gps接收機部分為儀器和gps系統提供介面，接收gps系統信號並解調相關信息，輸出所需的電文及時鐘基準信息等。
  19. Second, this dissertation implements separately a mpeg - 2 video decoder and a dolby ac - 3 digital audio decoder based on software mode, and gives a audio & video synchronization algorithm based on audio - clock - benchmark in mpeg - 2 system decoder, whose feasibility and practicability have been proved by experimenting. it is an all - purpose algorithm, which can perform different decoder according to mpeg - 1 or mpeg - 2 system models, and can also be used for reference to the implementation of other multiplex stream decoders

    然後，論文實現了基於軟體方式的mpeg - 2標準視頻及ac - 3格式壓縮音頻的實時解碼與回放，並依據mpeg - 2系統解碼模型實現了一種基於音頻基準時鐘的mpeg解碼器的視音頻同步演算法，實驗證明該演算法可行、實用、通用性好，對符合mpeg - 1或mpeg - 2系統標準的視音頻解碼器均具適用性。
  20. A new circuit of fan - out of high frequency clock was designed to provide a reference clock for the front electrical mode of pet system in the fourth " part of the thesis

    論文的第四部分介紹了為pet系統前端電子學模塊提供時間基準而設計的一種新型高頻時鐘扇出電路。
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