晶元系統 的英文怎麼說

中文拼音 [jīngyuántǒng]
晶元系統 英文
chip system
  • : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
  • : 系動詞(打結; 扣) tie; fasten; do up; button up
  • : Ⅰ名詞1 (事物間連續的關系) interconnected system 2 (衣服等的筒狀部分) any tube shaped part of ...
  • 系統 : 1. (按一定關系組成的同類事物) system 2. (有條理的;有系統的) systematic
  1. The microchip system is changing that

    晶元系統的采納改變了這一狀況。
  2. Application of microfluidic chip systems for the research of single cell

    微流控晶元系統在單細胞研究中的應用
  3. Then the effect of turning channel has been studied. 7. this detection system has been used to dna segments separation experiments ; the results showed that it has met the need for dna separation

    將該微通道電泳晶元系統應用於不同熒光標記寡核苦酸、 dna片段的分離分析,實現了寡核著酸的單堿基分辨,同時應用於結核桿菌基因組pcr產物的分析,實驗結果表明此可以實現dna片段的快速高效分析。
  4. The capillary electrophoresis principle and the recent developments of mce chip are reviewed. on the base of it, a novel design of mce chip system is presented. 2

    闡述了毛細管電泳的原理,以及微通道電泳晶元系統的原理和研究現狀,在此基礎上,提出了自己的研究思路; 2
  5. This paper mainly focuses on the following three field : system structure, system hw / sw ( hardware / software ) partition. synthesis and verification. and presents a hw / sw co - design method based on ip ( intellectual property ) core. we use this method to design asip, and verify this virtual machine using instruction codes, ac - 3 codes and ts ( transport stream ) flow

    本文從晶元系統的整體入手,重點從的結構、軟硬體分割以及晶元系統的設計驗證三個方面對該晶元系統的設計做了深入的研究,提出了一種基於ip核的軟硬體協同設計方法,運用該方法對asip進行設計,並採用虛擬機的模型,採用指令集程序、 ac - 3解碼程序、 ts流程序進行模擬驗證。
  6. Since low - voltage chips were used, the voltage transform chip of ldo was used to transform the voltage

    由於採用了多款低壓使用了ldo的電壓變換
  7. Status - register copy, single - chip systems

    晶元系統狀態緩存器復制
  8. Single chip system extension register

    晶元系統擴增緩存器
  9. The application of hardware decoding circuit is widely, because it not only can be used on computer, but also can be used on consumer equipment like digital - tv and dvd - player. the avs and h. 264 standards and the architecture of digital video decoder chip are investigated in the thesis, and a high - definition multi - mode decoder soc chip is proposed. the chip can support avs level 4. 0 / 6. 0 and h. 264 main profile level 4. 0

    本文在研究了avs和h . 264視頻編碼標準和數字視頻解碼晶元系統結構的基礎上,設計了同時支持avs和h . 264的高清解碼soc,能夠對avslevel4 . 0 / 6 . 0和h . 264mainprofilelevel4 . 0的高清晰度視頻碼流實時解碼。
  10. Peripheral addressing, single chip systems

    晶元系統外圍尋址
  11. By the analysis of jvm instruction set architecture and the measurement of typical java application programs, the crucial problems to be resolved are ascertained

    本文首先通過對java虛擬機指令的分析和對java典型應用程序的測試,提煉出java虛擬機指令的執行特點,明確了java晶元系統中需要解決的關鍵問題。
  12. With the outer coder ( reed - solomen coding ), the hdtv receiver chip can attain 14. 9db in signal - to - noise

    最後在整個晶元系統達到了14 . 9的噪聲門限。
  13. Among six published microarray expression datasets on acute leukemia, the biological signals hereafter provide stronger clustering support than systematic differences among microarray platforms

    6個公開的白血病數據的計結果顯示白血病亞型間的分子生物信號差異強于晶元系統間的差異。
  14. The design and fabrication of lif detecting system has been introduced in brief. the study of this dissertation showed that mce chip has some advantages such as high speed and sensitivity

    同時介紹了激光誘導熒光檢測的設計和構建;本論文的研究表明,微通道電泳晶元系統具有分析速度快、檢測靈敏度高等優點。
  15. Mce ( micro - channel electrophoresis ) chip and dna chip are two typical kinds of biochip combined with information technology. they have been applied for many fields, such as life science

    微通道電泳晶元系統和dna檢測晶元系統將生物技術和信息技術結合到一起,在生命科學、藥物化學、國防技術等領域具有廣闊的應用前景。
  16. Chapter one introduces the recent development of usb2. 0 and the overall architecture of transceiver interface ; chapter two proposes the design flow and design style ; chapter three presents the whole system and module partition ; chapter four emphasizes on the dual - mode transmitter circuit, and gives out the simulation waveforms ; chapter five focuses on the design of over - sampling receiver and dll ( delay locked loop ) module ; chapter six designs the band - gap reference circuit. in the end, it concludes the design, and estimates the trend of usb. the dissertation is emphasized on dual - mode transmitter architecture, implementation of high speed dll using dba ( digital - based analog ) technology and a new design methodology for complex digital modules in mixed - signal circuit

    本文第一章介紹了usb2 . 0的發展現狀和收發器介面晶元系統;第二章介紹了該的設計流程和風格;第三章介紹了該介面的總體構架以及模塊劃分;第四章著重介紹雙模發送器電路設計並給出了模擬驗證波形;接下來第五章分析了過采樣接收器的設計並對其中的dll ( delaylockedloop )模塊設計進行了詳細的分析;第六章介紹了本內置的基準電壓源的設計;最後對本文的設計一個總的回顧和總結,並展望下一代usb的發展方向。
  17. Parallel data transfers, single chip system

    晶元系統平行數據轉移
  18. Programming capabilities, single chip systems

    晶元系統規劃能力
  19. Program counter, single chip system

    晶元系統程序計數器
  20. Pointer registers, single - chip system

    晶元系統指針
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