晶元速度 的英文怎麼說

中文拼音 [jīngyuánsùdù]
晶元速度 英文
chirate
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  • 速 : Ⅰ形容詞（迅速; 快） fast; rapid; quick; speedy Ⅱ名詞1 （速度） speed; velocity 2 （姓氏） a surna...
  • 度 : 度動詞[書面語] （推測; 估計） surmise; estimate
  • 速度 : 1. [物理學] velocity; speed; blast; bat 2. [音樂] tempo3. （快慢的程度） speed; rate; pace; tempo
  1. We use fuzzy mathematical morphology to remove noise and dust which can lower noise successfully and also make up a loss of intensity caused by fluorescence blench. to acquire the target region, we purpose automatic gridding method based on image segmentation for image with irregular spots, it ' s segmentation through threshold. this method is presented simply and fast

    在網格定位中，本文針對信號點不規則的晶元圖像提出了基於圖像分割的自動定位方法? ?閾值分割，該方法簡單快速，但對于光密度分佈不均勻的信號點，可能會去掉部分微弱信號，降低了計算的準確性。
  2. In all kinds of complicated network, oriented linking and unlinking, communication frequency resource is strained, and bandwith to transmitting audio frequency signal is too restricted, complicated and fluky, while audio frequency data exponential have been increased in the last several years. under the circumstances, based on the research of predecessor, this paper studies wavelet analysis ' s maths gist and practices significance on signal process, and puts forward a optimized wavelet package condensation arithmetic to process audio frequency data, which gives attention to coding efficiency, multirate and compression delay. simulation experiment on the arithmetic has been done by matlab

    針對無連接和面向連接的各種復雜網路環境下，通信頻帶資源緊張，音頻傳輸帶寬有限且復雜多變，而各種音頻數據又日益增多的局面，本文研究小波分析在信號處理方面的數學依據和在數據壓縮方面的實際意義，在前人不斷工作的基礎上，提出了一種優化小波包變換編碼方案用於音頻數據的壓縮演算法，兼考慮了編碼效率、多碼率和壓縮時延多個方面，並在matlab環境下做了模擬實驗，對各種音頻信號及多種小波函數做了模擬結果比較，實驗結果證明該演算法可以在一定計算復雜度下可以很好地改進壓縮效果，達到多碼率下實現實時編解碼的過程，在高速dsp晶元等硬體設備支持下，可以有效應用於實際復雜多變信源編碼。
  3. But when the wind - speed becomes above 1m / s hereafter, wind - speed increase for the cpu thermal siphon of transmit heat the ability ' s gain result the deceleration. so it is considered perfect when the wind - speed is 1m / s. through this experimentation we found that when the cpu thermal syphon cooling machine used acetone as working fluid, wind - speed 1m / s, cpu chip caloricty 60w, its volumetric heat release rate came to 1. 3 104w / ( m3k )

    通過本次實驗測出所使用的cpu重力熱管散熱器在使用丙酮為工質，風速1m / s ， cpu晶元發熱量為60w時，其體積散熱率達到1 . 3 104w / （ m3k ） ，能保證晶元溫度與環境溫度之差小於40 ，能很好的適應pentium -計算機長期運行的要求。
  4. It shows that the injection quantity and the difference of temperature distribute as a parabola which is at the same load, and the minimum of the parabola corresponds to the optimum quantity of injection ( g ). under the condition that the quantity of injected mass, the air speed and the heat quantity is respectively g, v and q, the research demonstrates that the pentium iv chip ' s temperature variation can be controlled under 40c and work normally when the wind speed overpass 1. 5m / s and the power dissipation of the chip is 60w. otherwise this paper calculates the flooding limit of thermosiphon with several different methods

    對其充灌量、散熱量、電子元件（ cpu模擬晶元）表面與環境溫度之差及通風、流速的影響進行了系統的測試，發現充液量與溫差的關系在負荷不變時呈拋物線分佈，其極小值點對應的充液量是最佳充液量g 。在充液量為g時，對風速v 、散熱量q進行的研究表明，當風速超過1 . 5m / s后，奔騰晶元在60w發熱條件下晶元溫度小於40 ，能滿足長期正常工作。
  5. Due to the hardware characteristic ' s limitation, such as the poor speed of a / d, d / a conversion and dsp process, the most part of sr system adopt middle course. that is to say, by using the special digital converter or running relevant arithmetic, it converts the radio signal to intermediate frequency signal and completes the base - band signal process that is n ' t the veriest sr and is named " software defined radio ( sdr ) "

    由於受到硬體性能如a d 、 d a及dsp晶元處理速度的限制，目前的軟體無線電系統多採用折中的實現方案，增加專用的數字變頻器或者運行數字變頻演算法，將射頻信號變頻到中頻，然後再進行基帶信號處理，這樣的軟體無線電系統又被稱之為「軟體定義無線電」 ，它並不是真正意義上的軟體無線電。
  6. According to the m1l - std - 883c standard of thermal cycle loading, the delamination propagation rates at the interface between chip and underfill were studied experimentally by using c - mode scanning acoustic microscope ( c - sam ) for two types of flip chip packages with different states of solder joint

    採用mil - std - 883c標準，通過溫度循環實驗，使用高頻超聲顯微鏡（ c - sam ）無損檢測技術，測量了在不同焊點狀態下， b型和d型兩種實際倒裝焊封裝晶元與底充膠界面分層裂縫傳播速率。
  7. A arming control system of synchronous fitting missle is brough forward in this paper of which the arming control unit composes of the high speed digital signal processing chip dsp and fpga, and has better performance in speed and precision

    本文提出了一種雙聯裝導彈瞄準系統，其瞄準控制部分由高速數字信號處理晶元dsp和現場可編程門陣列fpoa構成，使得整個系統在速度和精度方面都具有較好的性能。
  8. The result shows that with the addition of rare earth elements, ultrasonic irradiation and magnetic field, the chemical component, surface configuration, microstructure and properties of electroless co - ni - b and co - fe - b alloy changes remarkably. such kind of change can be described as the followings. firstly the depositing speed of electroless alloy bath is raised while the polarizability and cathodic overpotential are reduced ; secondly the surface quality of the alloy coating and adhesion of the coating and matrix are improved ; thirdly in the coatings the content of the elements in the transient group increases, but the content of cobalt decreased ; fourthly the amorphous structure is transformed to microcrystal structure and polycrystal structure ; fifthly the microhardness and wear resistance of the coating are enhanced ; sixthly coercitive force is reduced, and magnetoconductivity of the coating is increased ; lastly the magnetic intensity of the coating increases with the addition of energy and light rare earth elements such as ce, la and decreases with the addition of heavy rare earth elements such as y. on the other side, when the alloy coatings passes through the heat treatment under the temperature of 250 or 500, their properties will change

    結果顯示化學沉積co - ni - b 、 co - fe - b工藝在稀土元素（ ce 、 la 、 y 、 dy ） 、能量（超聲波、磁場）介入后，沉積過程、合金成分、鍍層形貌結構和性能都有顯著變化，表現在：鍍液的陰極極化過電位和極化度降低，沉積速度提高；鍍層的結合力、表面質量改善；鍍層中過渡族元素的含量增加，輕元素硼的含量降低，同時證實了稀土元素與過渡族元素共沉積的可能性；鍍層的顯微結構由非晶態向微晶和多晶態轉變；鍍層的顯微硬度與耐磨性提高，力學性能優化；鍍層的矯頑力降低；磁導率提高；鍍層的磁化強度在能量（超聲波、磁場）和輕稀土元素ce 、 la介入后提高，重稀土元素y介入后降低。
  9. Code v algorithms are a key and dominant technology in the design of the microlithographic lenses that permit the imaging of ultra - fine lines on computer chips ? a necessary ingredient in the continuing improvement of computer speeds

    Code v演算法在設計微影成像鏡頭方面是一個關鍵的和主要的技術，微影成像鏡頭允許在計算機晶元上作超精細線成像?這在計算機速度的持續改進中是一個必然的組分。
  10. After which, the battery will be charged by large constant current to allow the fast charging. finally, the constant voltage charging is adopted to guarantee the battery was charged to its full capacity. under the condition that the temperature has raised to a certain threshold at the constant current charging stage, the over temperature circuit is performing and it provides a compensation current which switches the system to constant temperature charging mode with the intention of protecting the ic

    即在充電初期採用較小的電流對電池進行預處理，對出現過放電的電池進行修復和保護;然後採用較大的恆定電流對電池充電，實現快速充電的目的;最後採用恆定壓充電，確保電池充滿;在恆流充電階段，當晶元溫度上升到一定程度時，晶元過熱保護電路開始工作，該電路以提供充電補償電流的形式使充電進入恆溫充電模式，對晶元進行保護。
  11. The laser unit, because of its monochromaticity and small divergency, is used as sensor ’ s light source. devices and chips provided with high - speed responsing and processing capabilities are employed. as a result, the achieved uncertainty of time measuring is 125 ps, demonstrating an accuracy improvement in magnitude of an order

    在設計製作中採用了單色性和方向性好的激光作為光源，選取了高速響應和有高速處理能力的一系列器件、晶元，因此時間測量的精度達到了125ps ，比以往的測試方法提高了1個數量級以上，速度測量精度達到掃描速度的0 . 1 % 。
  12. In order to implement the speed and accuracy of demodulation, tms320vc5402 is used in the system. the design method of dsp and the f - p driving voltage is introduced in the thesis

    為了提高解調器的速度和精度，設計了基於tms320vc5402的高速信號處理系統，詳細討論了dsp晶元的選型和系統設計方法。
  13. Compares with the traditional wavelet transformation, the wavelet transformation of lifting scheme have some characteristics : the operating speed more quickly, home position operation, the dsp chip realization

    與傳統小波變換相比，提升格式小波變換具有運算速度快，原位運算，適合於dsp晶元實現等優點。
  14. In order to make the sensitivity of 2 - demension accelerometer along the two main arbors almost identical, symmetric four - beam structure that embeds a double - sides interdigitated differential capacitive with puckered beam in two directions was used as sensitive component. in addition, the differential capacitive accelerometer fabricated by bulky silicon micromechanical technique has high sensitivity, wide measurement scope, less nonlinear error, and simple converting circuit. then, the structure parameters of the sensitive component were calculated and stimulated, which results in a set of the optimized structure design parameters, main fabrication procedure and several key fabrication technology

    為使二維振動傳感器在兩主軸方向的靈敏度大致相同，敏感元件採用高度對稱的四梁結構，其中每個軸向上均採用帶折疊梁的雙側叉指電容結構，採用體硅微機械工藝製作的高深寬比叉指電容式敏感元件，具有高靈敏度、寬量程、非線性誤差小、外圍電路簡單等優點;對設計的敏感元件結構參數進行了計算，並利用有限元法進行了模擬分析，根據模擬結果得出了優化參數;在確定敏感結構的基礎上，研究了敏感元件採用體硅微機械加工工藝製作的工藝流程和關鍵工藝技術;對敏感晶元內部的c - v介面電路進行了原理設計與分析，利用差動測量技術得到由振動引起的微小電容變化量，經c - v介面電路進行相位調制處理，然後通過解調輸出與加速度成正比的電壓信號。
  15. Adopts vdsm process technology however two outstanding problems are faced to ic layout design when the feature size reaches to 0. 18 m or lower : 1. timing convergence problem seriously affects the circuits schedule, and the interconnect - delay has exceeded more than 70 % of the total circuits ’ delay. 2. si problem, usually it consists two aspects of ir - drop and crosstalk. these problems often affect the chip function after tapout

    本篇論文就是針對超深亞微米階段soc晶元後端設計所面臨的挑戰，提出了運用連續收斂的布局布線策略，尤其是虛擬原型的設計理論，來快速驗證布局，進而提高布線的成功率，並且提出了一種改進的布局評估模型，提高對soc晶元預測布線的準確度;同時，對于時鐘驅動元件選擇，文中提出了一種基於正態分佈模型來達到更有效的選取。
  16. High precision ad chip is used for intermediate frequency data sampling and fpga of virtex - series is used for the implementation of intermediate - frequency orthogonal system, which includes the sequencing control design for mult - channel radar system with verilog, the application of ip core of digital filter and fifo, as well as the communication control module with dsp. as the master control part, the software programming for the communication between dsp and fpga is designed. the experimental result with hardware circuit shows the design is valid and practical

    採用高精度的adc晶元完成中頻采樣，通過virtex -系列fpga設計中頻正交系統，主要包括通過verilog語言實現多路雷達中頻接收的時序控制，通過濾波器ip核實現濾波器的設計，以及利用c語言實現dsp的通訊控製程序設計。並給出了fpga在資源和速度上一些優化的方法，調試過程中影響中頻正交接收性能測試的因素。
  17. The higher the processing speed of computer, the more heat generating from cpu chip. if the heat ca n ' t be dissipatied effectively, the processing stability and speed will be decreased dramatically

    計算機運行速度越高其晶元cpu發熱量越大，如果這些熱量得不到有效散逸，會制約晶元速度的進一步提高。
  18. Because the performance of single microprocessor can " t be improved indefinitely due to the limitation of speed and machining technology of chips, so came the massive parallel processors system

    而單處理器計算機系統由於處理器運算性能受限於晶元速度極限和加工工藝極限，不可能無限提高。於是超大規模并行處理系統應運而生。
  19. Dsp appliance develops more and more abroad because dsp integrates with embedded technology. along with the improvement of chip speed, every high speed digital signal processing technology becomes more and more convenient, and systemic real time quality comes to be ensure. because of the characteristics of complex arithmetic and large data, people seek incessant aim of finer digital signal processing arithmetic and higher speed processors

    特別是嵌入式技術與dsp技術的結合，更使dsp的應用向更深更高的方向發展。隨著dsp晶元速度的不斷提高，各種高速數字信號處理越來越方便，並為實現系統的實時性提供了有力的支持。
  20. Dsp technology brings a revolution in the field of digital signal processing. along with the improvement of chip speed, every high speed digital signal processing technology becomes more and more convenient, and systemic real time quality comes to be ensured

    Dsp技術帶來了數字信號處理領域的一場革命，隨著dsp晶元速度的不斷提高，各種高速數字信號處理越來越方便，並為實現系統的實時性提供了有力的支持。
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