晶體同步控制 的英文怎麼說
中文拼音 [jīngtǐtóngbùkòngzhì]
晶體同步控制
英文
crystal sync- 晶 : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
- 體 : 體構詞成分。
- 步 : Ⅰ名詞1 (步度; 腳步) pace; step 2 (階段) stage; step 3 (地步; 境地) condition; situation; st...
- 控 : 動詞1 (告發;控告) accuse; charge 2 (控制) control; dominate 3 (使容器口兒朝下 讓裏面的液體慢...
- 制 : Ⅰ動詞1 (製造) make; manufacture 2 (擬訂; 規定) draw up; establish 3 (用強力約束; 限定; 管束...
- 晶體 : [晶體學] crystal; vitrella; crystal body; crystalloid; x-tal
- 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
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At the same time the principles of triggering pulse to the three - phase thyristors is discussed, and a way using monostable multivibrator to produce the pulses has been given below. the hardware control system based on tms320f240 is designed, which includes sampling circuit, protective circuit, phase - compensated circuit and so on
對三相晶閘管控制電抗器的觸發脈沖產生原理進行了分析,採用單穩態觸發器實現六相觸發同步;設計了以tms320f240為控制核心的硬體控制平臺,包括采樣電路、保護電路、六相觸發同步等外圍電路。The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions
本文論及的「時鐘」概念不是指日常生活中使用的鐘表,而是由產生基準頻率的信號發生器(如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等)中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備,它提供用在通信系統中控制某些功能的定時的時間基準設備,時鐘提供的信號稱為基準信號、定時信號或同步信號。To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation
論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點,在對目前微機勵磁控制器分析基礎上,提出採用dsp控制器晶元作為核心處理器的微機勵磁控制器的解決方案,運用復雜可編程邏輯器件cpld晶元實現可控硅同步脈沖觸發單元,並簡要說明了verilog硬體描述語言和數字脈沖形成邏輯的方法,通過電路數字模擬對所設計的數字觸發單元進行了驗證。A system with repmsm ( rare earth permanent magnet synchro - nous motor ) as executing motor is presented in this thesis. the hardware platform for the ac speed regulating system is based on tms320f240 dsp controller and uses ipm ( intelligent power model ) as the power device in the invert circuit
系統選用正弦波永磁同步電動機為執行電機,以ti公司的tms320f240dsp晶元為控制核心,以智能功率模塊( ipm )為逆變電路功率開關器件,構成交流調速系統的硬體平臺。Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail
針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向,本論文重點做了以下幾個方面的工作,目的在於提高dtc系統的綜合性能: ( 1 )提出一種新型的速度磁鏈觀測器,新型的速度磁鏈觀測器採用自適應閉環磁鏈觀測器代替傳統的積分器從而提高磁鏈觀測的精度,並且根據popov超穩定性理論推導出轉速的新型自適應收斂律; ( 2 )改善系統的低速運行性能,主要從提高低速時對定子磁鏈的估計精度入手,提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數; ( 3 )採用數字信號處理器dsp實現系統全數字化硬體控制,結合ti公司生產的tms320lf2407晶元,設計了直接轉矩控制系統的實驗裝置; ( 4 )提出了基於sercos總線網路化分散式的直接轉矩控制系統, sercos ( serialrealtimecommunicationsystem )是目前最適合同步和協調控制的串列實時通信協議; ( 5 )基本勾勒出整個控制系統的硬體和軟體設計基本框架,詳細描述一些實驗中的具體的細節問題。In such situation, controlling of the transf - orming process and synchronizing of sampled data only could be achie - ved via hardware, and data must be stored ( by using high - speed stora - ge chip ) and digital signal must be processed ( by using high - speed d - sp ) in real time simultaneously
在這種情況下,通常只能用硬體實現轉換過程的控制和采樣數據的同步,仔細設計時序電路,同時必須採用高速存儲晶元對數據進行存儲和高速的數字信號處理器( dsp )完成數字信號的實時處理。For the image acquisition of optical scan mode, normally, ccd image sensor is used to capture image, but in our system, due to the system request of micromation and high integration, cmos image sensor is adopted as the image collection device, and then the thesis gives a interface circuit between the chip and dsp and a control solution of image collection ; toward the information storage in our solution, dsp is directly linked to usb host chip and it is the dsp that accomplishes the processing of usb protocol and interface control so as to reduce the cost, minimize product cubage and consequently meet the requirement of system micromation ; at the same time, the thesis probes preliminarily into usb otg ( on - the - go ) technology, which offers an approach between embedded machines including pda, mobile phone, printer, digital camera and so on ; in addition, some attempts on the other application area with tms320vc5402 which was commonly used to voice processing and static image processing are done, for example, to arrange the chip to control lcd module directly
在圖像的光電掃描輸入上,傳統方案大部分採用ccd型圖像傳感器,而在本方案中,根據系統微型化、高集成的特點,使用了cmos圖像傳感器作為攝像器件,並且設計了該晶元與dsp的一種介面電路以及圖像採集控制方案;在信息存儲上,本方案採用dsp直接與usbhost晶元連接,由dsp處理usb協議和介面信息,從而降低了系統成本、縮小了產品體積,滿足了系統微型化的要求;同時本論文也對usb - otg技術進行了初步探討,利用此項技術,不再需要計算機作為主機,就能實現在pda 、移動電話、印表機、數碼相機等嵌入式應用之間直接互聯通信;另外也對廣泛用於語音處理和靜態圖像處理的tms320vc5402其它方面的應用進行了嘗試,比如直接控制液晶顯示器等。An idea is brought forth to design the total structure of the usb interface ip, the main control logic, the mcu interface ( the function is the same as the pdiusbd12 chip of the philips semiconductor ) and a dpll which is used to synchronize data and separate the clock. this paper also introduces packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding,
提出設計了usb介面電路的整體構架,設計了usb的主要控制邏輯和與mcu的互連的介面(此介面與飛利普的usb介面晶元pdiusbd12兼容) ,也設計了一個數字鎖相環( dpll )來同步數據和分離時鐘,並對同步模式的識別、并行/串列轉換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。According to the following design theory : the dsp calculates in real time and produces three phases spwm waves to control the on or off of the 6 igbts in ipm respectively. ipm then inverts the commutated single phase direct current ( insulated gate bipolar transistor ) into three phases alternating current. when modulated signals of spwm are changed, the on - off time of switches also changes, so as to the voltage and frequency of output signals
本文提出了一種基於dsp (數字信號處理器tms320f240 )的通用的三相間接變頻電源系統,利用分段同步調製法和混合查表法,實時計算不同頻率下的采樣周期、電壓幅值、輸出脈寬,產生雙極性spwm波形,經驅動放大後用于ipm ( intelligentpowermodule )中的絕緣柵雙極型晶體管柵級驅動,以控制電源的輸出電壓和頻率,實現變頻電源的智能數字控制。分享友人