板上晶元 的英文怎麼說

中文拼音 [bǎnshàngjīngyuán]
板上晶元 英文
chion board （cob）
  • 板 : Ⅰ名詞1 （片狀硬物體） board; plank; plate 2 （專指店鋪的門板） shutter 3 [音樂] （打拍子的樂器） ...
  • 上 : 上名詞[語言學] （指上聲） falling-rising tone
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  1. Physical equipment as opposed to programs, procedures, rules, and associated documentation ; chip level solutions that hook onto back plane of computer to protect it

    與程序、過程、規則和相關文件相對的物理設備；固定於計算機背板上的晶元保護裝置。
  2. The very first power1 was actually several chips on a single motherboard ; this was soon refined down to one rsc risc single chip with more than a million transistors

    最初的power1晶元實際上是在一個主板上的幾個晶元；后來很快就變成一個rsc （ risc單一晶元） ，其中集成了100多萬個晶體管。
  3. The broadcom bcm91250a evaluation board comes with an sb1 1250 chip with two cores which are supported in smp mode by this installer

    帶有sb1 1250雙核晶元的broadcom bcm91250a開發板本，在本安裝程序上以smp模式獲得支持。
  4. Finally, the solid phase nested three loci pcr was applied to detect hbv, hcv and hiv - 1 in the blood samples and the amplified dna products on the chip surface were detected by the enzymatic indicator system

    對陽性血清樣品中獲得的模板，在玻片上運用固相巢式三重pcr和晶元酶學檢測方法檢測hbv 、 hcv和hiv 1 ，獲得良好的晶元酶學檢測結果。
  5. This paper first begin with the connotation of virtual instrument technology, study and discuss the criterion and the working theory of usb deeply. on the principle of usb1. 1criterion, using usb interface chip usbn9604 and low consumption mirochip c8051f231, we designed the available interface of usb bus and its controlling software, turn the communicating function based usb bus between computer and testing device. second based on the developed interface of usb bus, using microchip pic16c62 and a mount of relays, we designed the multiswitching scanner and its controlling software to complete the funtion of accesses swithing in testing system. third calling the api function inside the windows using vb programming language, communicat with the impelling program of selected hid, achieve the function of testing instrument with usb interface, complete the development of upside software faced testing. at last, based on the deep studying of pcb testing method, used the developed multiswithing scanner and software faced testing, combinated with necessary testing instrument, we constructed the pcb testing system and analized the testing result simply

    論文首先從虛擬儀器的技術內涵出發，深入研究和討論了通用串列總線usb規范及工作原理，並依據usb1 . 1規范，採用usb介面晶元usbn9604和低功耗微處理器c8051f231設計開發了通用的usb總線介面及其控制固件，實現了通用計算機與測試設備之間基於usb總線的通信功能；其次，在所開發的usb總線介面的基礎上，使用微處理器pic16c62和多路繼電器開關，設計開發出實現測試系統中測試通道切換功能的多路通道掃描器及其控制固件；再次，採用vb語言編程，調用windows內部api函數，與選定hid類驅動程序進行通信，實現usb總線介面測試儀器功能，完成面向測試的上層軟體開發；最後，在深入研究印刷電路板測試方法的基礎上，利用已開發的多路通道掃描器和面向測試軟體，結合必要測試儀器組建印刷電路板測試系統，並對測試結果進行了簡要的誤差分析。
  6. Secondly, the composition and function of expander board is introduced, the paper describes a detail developing process of selecting component, design interface circuit, protract pcb with protel and design pci interface logic and user ' s logic. with ahdl and max + plus. in addition this paper discusses how to debug pci board, and give the simulation waveform and the result of debug. on the base of all functions is ture, this paper introduce the config registers and memory of bu - 61580, realize the interrupt function and communication based on mil - std - 1553b

    首先分析了擴展板的組成、功能，對pci介面邏輯和擴展板的內部邏輯進行詳細設計，並根據其資源要求進行器件選擇，然後使用protel工具進行電路板的製作。另外，本文還介紹了擴展板的調試方法，給出了邏輯模擬波形和調試結果。在此基礎上，本文闡述了協議晶元的配置方法，實現了1553b通訊擴展板間的通訊及中斷功能，達到了開發技術指標。
  7. I talked to someone who did it, by taking apart and desoldering a usb to serial adapter to connect the kuro box s 3. 3 volt, inverted, serial signals to another chip that used these - and soldered the missing resistor onto the kuro box s motherboard

    我與某個曾經這樣做的人聊過，他將機器拆開，把usb拆換為串列適配器來將kuro box的3 . 3伏電壓串列信號反向連接到使用這些信號的另一個晶元並將缺少的電阻器焊接到kuro box的主板上。
  8. After that, the hardware circuit, especially some of the key parts, is investigated in detail. the following processes are also investigated in detail : empoldering the four fold - frequency subdivision 、 direction - judgment 、 counting and flip - latch of the data with vhdl ( very high speed integrated circuit hardware description language ) ; empoldering the serial interface and the data collection software in pc with borland c + + builder

    接下來詳細介紹了使用vhdl語言開發fpga晶元的細分、辨向、計數、鎖存以及串列傳輸處理等全部功能;用borlandc + + builder開發了pc機上的串列介面、數據採集軟體;設計並製作了fpga晶元及其外圍電路的電路板。
  9. With the development of semiconductor process technology, nowadays a system on a pcb ( printed circuit board ) which is composed of several ics can be integrated into a chip

    隨著集成電路製造工藝的飛速發展，人們已經可以將原先用各種電路搭建的板極系統集成在一塊晶元上。
  10. Integrated circuit design has entered into the era of system on chip ( soc ), the bus interconnect architecture of system on board have also developed into a kind of hierarchy architecture - on chip bus ( ocb )

    隨著集成電路設計進入到系統晶元（ soc ）時代，板極系統的總線互連結構也發展成為系統晶元的層次化總線體系一片上總線。
  11. Part two : design the schematic of the intelligent communication card ; to apply protel99 software to design sch and pcb charts, then send them to the factory ; to debug on the hardware and test on can bus chip ; to program assemble language control and can bus communication software of the intelligent communication card and debug on the super ice16 simulator ; to utilize the super ice 16 simulator to debug the control programs of the communication card online ; link to control card and debug the can bus communication program online ; to debug the system on eprom

    第二部分：設計can總線智能通信卡的硬體電路，應用protel99設計軟體繪制原理圖及印刷電路板圖，並送廠製作板卡電路板:智能通信卡硬體製作和can總線晶元調試;編寫通信卡控制及can總線通信匯編語言程序並編譯;在superice16模擬器上在線模擬調試控製程序;連接系統控制卡，模擬調試can總線通信程序;程序燒入eprom晶元，進行系統eprom模擬調試;介面系統驅動程序及測試軟體調試。
  12. Our company can offer pcb to the masses of customers and copy the board, change board, pcb design, principle picture make, bom from make, chip decipher and pcb produce, stick to scenes of processing a connected sequence. our aim : " quality first, the customer is the highest " we will do the best service for you with the biggest cordiality in any demand of yours, expect to cooperate, with you sincerely

    我司可為廣大客戶提供pcb抄板改板pcb設計原理圖製作bom單製作晶元解密以及pcb生產貼片加工一條服務。我們的宗旨： 「質量第一，客戶至上」您的任何需求我們都將以最大的熱誠為您做最好的服務，真誠期待與您合作。
  13. Finite element method ( fem ) was used to simulate thermal and vibration problems in stacked - die csp assembly. finite element models and apdl programes were built in ansys to conduct thermal, thermal - mechanical and vibration analysis. the aim of these researches were trying to find some possible reasons and trends which affect the reliability of stacked csp / bga assembly and give some useful suggestions for the packaging design

    本論文正是針對以上情況，以採用引線鍵合工藝的三維疊層csp / bga封裝（裸晶元疊裝）為研究對象，在有限元分析軟體ansys中建立相關的有限元模型，編制了相應的apdl參數化分析程序，進行了溫度場分析、熱循環加載下的snpb合金焊點疲勞分析和實裝pcb板的振動模態分析。
  14. Then a comparison is made according to their characters and the application scope of each method is determinate. from that we get the whole scheme of design for testability of dspc50, which is using boundary scan to improve the board - level testability of the chip and using full - scan in designing the nuclear circuit to reduce the difficulty of testing the chip

    在此基礎上得到dspc50的可測性設計的整體方案，即採用邊緣掃描設計提高晶元在板級的可測性，同時用全掃描思想設計晶元核心電路，以降低晶元本身測試的難度，即將晶元的全掃描設計包含入邊緣掃描系統。
  15. Dual - core embedded processor has high performance, high reliability, low frequency, so, it ’ s cared by many processor chip manufacturer. more, it has good pin compatibility, design compatibility with the prior signal - core processor, so, has attract many big telecomm equipment supporters. but, it need the support from the new real time operating system which under designing

    雙核嵌入式處理器以其高性能，低主頻，高可靠性正得到許多晶元生產商的關注，它具有良好的管腳兼容性，與單板硬體設計上的與單核處理器具有良好的兼容性，得到許多電信設備製造商及嵌入式高端應用集成商的垂青。
  16. While the chips are attached to different kinds of substrates, the evolution trends of surface residual stress are also different

    在不同基板上固化時，晶元表面應力演化過程不同。
  17. This card largely depends on three integrate chips to fulfill its function : 1 ) nic control main chip, corresponding the mac sublayer of ethernet, to realize csma / cd media access protocol, manage the sending and receiving buffers integrated on the chip and provide motherboard pci interface. 2 ) serdes ( serializing and deserializing ) chip, corresponding pcs and pma sublayers in ethernet, mainly to complete 8b / 10b coding and convert 10 bits parallel data to serial data, and convert them again at the receiving end. 3 ) fibre transceiver unit, completing light - electrical conversion of seri

    該網卡主要由3塊集成的晶元完成其功能，分別是i ）網路控制主晶元，對應于以太網的mac子層，主要完成csmaicd介質訪問協議，管理片上集成的發送和接收緩沖區，並提供和主板p0總線的介面： b ） s rd s （串列解串列化器）晶元，對應于以太同的pcs和pma子層，主要完成sb lob編碼並將10位并行的數據轉換為串列數據，在接收端完成相反的功能：涌）光纖收發器，完成串列數據的光電轉換功能。
  18. The integral structure of system are analyzed, and a scheme based on dsps processing board + mcu control board are put forward firstly, following design difficulties and relevant measures. every modules of dsps board are described in details, including chips selection, implementation manners choice, interface and time sequence match and etc. compared otsu single threshold segmentation with multi - threshold segmentations, the latter are preferred to perform the object identification in hardware designed by author. combined to like background rejection, morphology expansion and etc. steps, the paper gets the length of queue ; finally, a - b united control and area united control based on can bus are designed

    首先分析了系統的總體結構，提出了一種基於dsps處理板+單片機控制板的信號機實現方案；在此基礎上，重點介紹了處理板模塊化的硬體電路設計，其中考慮了晶元的選型、實現方式的選擇、工作機制、時序匹配等問題；之後，分析了otsu單閾值目標識別和多閾值目標識別的效果，重點選擇後者在硬體電路板內對圖像進行了目標識別的演算法處理，結合背景的剔除、形態學膨脹等幾個減小誤差的措施，對車輛排隊長度進行了較為精確的提取；最後在控制板上完成了干線a - b信號聯動控制和基於can總線的區域聯網控制的通訊方案設計。
  19. Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function

    本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。
  20. These power chips changed the technology landscape by implementing two cores so the ability to have two separate circuitry units executing compute instructions on a single chip something that plugs into the board

    這些power晶元實現了單晶元（插入到主板上的部件）上的雙核心（所以能夠讓兩個獨立的電路單元執行計算指令） 。
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