板級晶元 的英文怎麼說

中文拼音 [bǎnjīngyuán]
板級晶元 英文
cob chion board
  • : Ⅰ名詞1 (片狀硬物體) board; plank; plate 2 (專指店鋪的門板) shutter 3 [音樂] (打拍子的樂器) ...
  • : Ⅰ名詞1 (等級) level; rank; grade 2 (年級) any of the yearly divisions of a school course; gra...
  • : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究,提出了任務容錯調度演算法以及基於檢查點技術的系統容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件容錯技術,提出了對容錯模塊這一星載并行計算機關鍵部件的兩容錯方案,實現該方案所需增加的電路少,可避免板級晶元以及fpga內部任何邏輯發生單點故障。
  2. This paper refers to several creation in compatibility with large volume of fed display and conversion of different video signal. it firstly used special central chip al300, designed correlative circuits, successfully developed vga full - color fed console system, compatible with resolution 1280 1024, achieved functions such as multi - video signal conversion and interleaving, met vga ’ s resolution of fed. it firstly designed and fabricated vga interface and separated video interface - - s - video, converting several video signals to 24 bits full - colored digital image signal in fed driving system, achieved separation of luminance signal and chromatism signal, enhanced the bandwidth of luminance signal

    首次採用平顯示專用控制al300 ,設計並製作了相關配套電路,支持的最高解析度是1280 1024 ,實現解隔行和多種視頻格式轉換的功能,滿足了fed顯示屏對vga解析度的要求。首次在基於fpga的vga彩色fed控制系統中設計並製作了vga介面和分離電視信號s - video介面,可以將多種視頻信號變換為fed驅動系統可用的24位彩色數字圖像信號,實現亮度信號和色差信號的分離,提高了亮度信號的帶寬。
  3. Ning bo is round - the - world yu sipu accuses a group is a diversity that gives priority to course of study with illume, electric equipment, house property and meal the industry controls a group company ; main scope of operations : energy - saving lamp and derive article, the production of tv of flat liquid crystal and sale, develop and manage the astral class public house that reachs meal of estate to serve government ; as the company fast and steady progress reachs the promotion of each industry, invite sincerely a man of insight to join in enterprise, conspire to develop

    寧波環球宇斯浦控股集團是一家以照明、電器、房產以及餐飲為主業的多化產業控股集團公司;主要經營范圍:節能燈及衍生品、平電視的製造和銷售,房地產的開發和經營及餐飲的星酒店服務管理;隨著公司快速穩健發展及各產業的提升,誠邀有識之士加盟企業,共謀發展。
  4. Then a comparison is made according to their characters and the application scope of each method is determinate. from that we get the whole scheme of design for testability of dspc50, which is using boundary scan to improve the board - level testability of the chip and using full - scan in designing the nuclear circuit to reduce the difficulty of testing the chip

    在此基礎上得到dspc50的可測性設計的整體方案,即採用邊緣掃描設計提高的可測性,同時用全掃描思想設計核心電路,以降低本身測試的難度,即將的全掃描設計包含入邊緣掃描系統。
  5. However, the die attach layer delaminated after 500 cycles and pcb cracked in the underfilled samples after long time cycling. c - sam is employed to investigate the delamination in the underfilled samples. highly concentrated stress - strain induced by the cte mismatch between the bga component and the pcb board, coarsened grain and two kinds of intermetallic compounds ( nisn / nisns ) which formed during reflow and thermal cycle and their impact on the reliability of solder joints are discussed in this paper

    充膠樣品粗化尤為嚴重; ? ni - sn金屬間化合物包括兩層:其中,靠近ni焊盤的那層比較平整,同時, eds結果分析表明其化學式近似為nisn ,而靠近焊料的那層呈條狀,化學式近似為nisn _ 3 ,文獻表明其為亞穩相; ?充膠使得樣品最大應力范圍降了接近一個數量並降低了dnp的作用,同時,器件失效模式變為粘接層分層; ? c - sam結果表明本論文採用的充膠樣品,粘接層分層起始於500周左右,而經過2700周循環的樣品,分層幾乎擴展到整個界面。
  6. Multichip module ( mcm ) is high - level mode in electronic package. mcm is that bare dice and microelements are assembled on a high - density interconnection ( hdi ) substrate. mcm can meet the demands of compact packaging and high density

    組件( mcm )是微電子封裝的高形式,它是把裸與微型件組裝在同一個高密度布線基上,組成能夠完成一定的功能的模塊甚至子系統。
  7. System functions of gsmb based on " godson " cpu was programmed by the discussion of " godson " cpu micro - system structure finalization and by the introduction of " godson " cpu performance requirements. this essay also specified on gsmb board level system structure, bios level solving and selection of important chips. moreover, problems related to high speed circuit design such as mensurability, pcb layout signal integrity, electromagnetic coexist were researched

    通過對「龍芯1號」 ( godson ) cpu微體系結構定型的討論和關于「龍芯1號」 cpu所需達到的的性能指標的介紹,規劃了基於「龍芯1號」 cpu的高速服務器主gsmb的系統功能,並敘述了根據系統功能所設計的gsmb系統結構、 bios解決方案和重要的選型;另外還研究了高速電路設計所涉及的如可測試性、信號完整性、電磁兼容性等一系列問題,並依據研究構建了基於ibis的軟體模擬模型,同時藉助eda模擬分析工具對關鍵線網與關鍵模塊進行了模擬。
  8. Bsp supplies the simple interface to operate the peripheral chips conveniently. thus, real - time operating system ( rtos ) can start up from the various hardware successfully and response to the asynchronous event opportunely. on the other hand, rsp implements the encapsulation to rtos and brings up the process model according to the running character of the business layer, realizes the secondary process schedule inside task

    一方面,支撐子系統bsp層(支撐包)的設計實現了對硬體層的封裝,這包括對cpu ( mpc8241 )的封裝和對外部(串口、網口等)的封裝,通過這層封裝使得實時操作系統能夠成功啟動,及時響應異步事件,實現了硬體的基本功能,並且為上層提供了簡單易用的操作的介面,隔離了軟體對硬體功能要求所必需的具體細節。
  9. With the development of semiconductor process technology a system on a pcb ( printed circuit board ) which is composed of several ics can be integrated into a chip

    隨著集成電路工藝的飛速發展,人們已經可以將原先的系統集成在一塊上,系統逐漸成為集成電路設計的主流發展趨勢。
  10. Pentaco, spol. s r. o. - the delivery program covers material, retail and chipboards as well as clocks and coal

    是一家高企業,該企業針對客戶需求製造專門的,時鐘,煤、碳,細分、細節,材料。
  11. " i always pay my debts. four prototype super chips, value five million dollars each.

    「我是有債必還的。這是四個電腦超的樣。每個值五百萬美。 」
  12. In this way, developer can offer the ic to others for sale, but the way based on dsp ic hardly does. in our research project, we also do the simulation by the software of maxplus, quaturs and emulation board based ic epm7128slc84 - 15, and get the satisfied result

    在本課題開發過程中,我們使用maxplus和quaturs對提出的ip核、速度/加速度控制模塊等進行了軟體的模擬和測試,並最終在自行設計的可編程模擬(使用epm7128slc84 - 15可編程)上進行了硬體的模擬,取得了滿意的效果。
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