柵偏壓電源 的英文怎麼說

中文拼音 [zhàpiāndiànyuán]
柵偏壓電源 英文
grid bias supply
  • : 柵名詞(柵欄) railings; paling; palisade; bars
  • : Ⅰ形容詞1 (不正; 歪斜) inclined to one side; slanting; leaning 2 (只側重一面) partial; prejudi...
  • : 壓構詞成分。
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 名詞1. (水流起頭的地方) source (of a river); fountainhead 2. (來源) source; cause 3. (姓氏) a surname
  • 電源 : source; current source; electric source; power pack; power supply; power source; source of power ...
  1. Source of electron gun grid bias

    子槍柵偏壓電源
  2. For the demand of output swing, the bias is provided by high - swing cascode current mirrors

    為了獲得高輸出擺幅,設計低流鏡為運放提供置。
  3. On the one hand, the design uses low voltage cascode op framework to improve its gain ; on the other hand, it applies self - bias and cascode structure to the whole sensing circuit. by using the improved method, we have successfully obtained low power consumption, low offset, high linear and high psrr ptat current generator under low power supply

    路設計上一方面改進運放結構,採用低結構以提高其增益,另一方面整體傳感路採用自置結構和共流鏡結構,在低下成功設計了低功耗、低失調、高線性度和高抑制比的ptat流產生路。
  4. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時,為了使輸入共模范圍達到軌至軌,不是採用傳統的差動輸入結構,而是採用了nmos管和pmos管並聯的互補差動輸入對結構,並採用成比例的流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中,流鏡負載並不是採用傳統的標準共結構,而是採用了適合在低工作的低寬擺幅共結構;在輸出級設計時,為了提高效率,採用了推挽共級放大器作為輸出級,輸出擺幅基本上達到了軌至軌;本論文改變傳統基準基於運放的設計,採用了帶流鏡負載的差分放大器設計了一個基準,給運放提供穩定的流和,保證了運放的穩定性;並採用了帶調零阻的密勒補償技術對運放進行頻率補償。
  5. In this paper, a three phases high - voltage power mos gate drive integrated circuit has been researched and designed successfully. it is a typical spic, which could be widely used in high power motor control and switching power supply applications. the design goal of the circuit are v0ffset ( max ) is 500v, ia ( m ~ ) is 1 a, the highest frequency of operation ( f ( ~ x ) ) is 100khz

    本文研製成功了一種可廣泛用於大功率機控制、開關等應用中的spic路?三相高功率mos驅動集成路,其設計指標要求為:最高( voffset ( max ) )為500v 、最大輸出流( i _ o ( max ) )為1a 、最高工作頻率為100khz 。
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