柵極驅動 的英文怎麼說
中文拼音 [zhàjíqūdòng]
柵極驅動
英文
gate drive-
Based on the hydrodynamic energy transport model, the influence of variation of negative junction depth caused by concave depth on the characteristics of deep - sub - micron pmosfet has been studied. the results are explained by the interior physical mechanism and compared with that caused by the source / drain depth. research results indicate that with the increase of negative junction depth ( due to the increase of groove depth ), the threshold voltage increases, the sub - threshold characteristics and the drain current driving capability degrade, and the hot carrier immunity becomes better in deep - sub - micron pmosfet. the short - channel - effect suppression and hot - carrier - effect immunity are better, while the degradation of drain current driving ability is smaller than those with the increase of depth of negative junction caused by source / drain junction shallow. so the variation of concave depth is of great advantage to improve the characteristics of grooved - gate mosfet
基於能量輸運模型對由凹槽深度改變引起的負結深的變化對深亞微米槽柵pmosfet性能的影響進行了分析，對所得結果從器件內部物理機制上進行了討論，最後與由漏源結深變化導致的負結深的改變對器件特性的影響進行了對比.研究結果表明隨著負結深（凹槽深度）的增大，槽柵器件的閾值電壓升高，亞閾斜率退化，漏極驅動能力減弱，器件短溝道效應的抑制更為有效，抗熱載流子性能的提高較大，且器件的漏極驅動能力的退化要比改變結深小.因此，改變槽深加大負結深更有利於器件性能的提高Technique of igbt gate driving
柵極驅動技術探討After structure design aimed to high transconductance, parameters of device structure are modified in detail. the simulation results of soi nmos with strained si channel show great enhancements in drain current, effective mobility ( 74 % ) and transconductance ( 50 % ) beyond conventional bulk si soi nmosfet. the strained - soi nmosfet fabrication process is proposed with lt - si ( low temperature - si ) technology for relaxed sige layer and simox technology for buried oxide
其次，根據器件參量對閾值電壓和輸出特性的影響，以提高器件的跨導和電流驅動能力為目的設計了strained - soimosfet器件結構，詳細分析柵極類型和柵氧化層厚度、應變硅層厚度、 ge組分、埋氧層深度和厚度以及摻雜濃度的取值，對器件進行優化設計。Gate drive stage
柵極驅動級The permanent magnet brush - less motor is driven effectively by selecting the bootstrap components properly and dealing with the parasitics correctly. the software design is composed of c language for dsp and vhdl ( high speed hardware description language ) for cpld
設計了基於功率mosfet和柵極驅動晶元ir2130的功率驅動電路，通過對驅動電路自舉元件的合理選擇以及寄生效應的正確分析和處理，實現了無刷直流電機的高效驅動。According to the following design theory : the dsp calculates in real time and produces three phases spwm waves to control the on or off of the 6 igbts in ipm respectively. ipm then inverts the commutated single phase direct current ( insulated gate bipolar transistor ) into three phases alternating current. when modulated signals of spwm are changed, the on - off time of switches also changes, so as to the voltage and frequency of output signals
本文提出了一種基於dsp （數字信號處理器tms320f240 ）的通用的三相間接變頻電源系統，利用分段同步調製法和混合查表法，實時計算不同頻率下的采樣周期、電壓幅值、輸出脈寬，產生雙極性spwm波形，經驅動放大後用于ipm （ intelligentpowermodule ）中的絕緣柵雙極型晶體管柵級驅動，以控制電源的輸出電壓和頻率，實現變頻電源的智能數字控制。分享友人