模塊介面電路 的英文怎麼說

中文拼音 [kuāijièmiàndiàn]
模塊介面電路 英文
mic module interface circuit
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 名詞(古時佩帶的玉器) penannular jade ring (worn as an ornament in ancient china)
  • : Ⅰ名詞1 (頭的前部; 臉) face 2 (物體的表面) surface; top 3 (外露的一層或正面) outside; the ri...
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • 模塊 : camac module,camac
  • 介面 : joggle; nozzle; mouthpiece; [計算機] interface
  • 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. The fourth chapter : in this chapter, it introduces the hardware designing of the dsp system based on pci bus and states every module of the hardware designing : circuit of signal adjusting, filter circuit of anti - overlap, circuit of data - acquisition automatically, expanding circuit of dsp memory, circuit of voltage matching, interfaces circuit of pci etc. it also includes theoretic basis and procedure of pcb designing

    第四章紹基於pci總線的dsp系統硬體設計。敘述了硬體設計的各個:信號調理、抗混疊濾波、自動數據採集、 dsp存儲器擴展平匹配、 pci等,以及pcb設計的理論基礎和設計過程,並給出了設計和調試的結果。
  2. And the grating signal receive circuit, fpga module circuit and output signal interface circuit are integrated into one board - dual grating signal process board

    並將fpga、雙光柵尺信號接收與外部集成為自行設計的雙光柵尺信號處理卡。
  3. It eliminates the need for agent blocks to have specific knowledge of ram array behind it. it takes care of protocols and latencies in an effort to simplify memory access by the agent blocks. agent blocks " see " a single linear frame buffer, all paging and bank swapping is handled by the and is transparent to the agent blocks

    在嵌入式系統晶元中高速存儲器控制是系統必不可少的重要組成部分,由於有了存儲器的存在,使得系統內部客戶不必專門了解存儲器本身的復雜特性,而只需關心傳輸協議和一些定義的遲滯參數,在客戶看來存儲器僅僅是一個線性的幀緩沖器,所有的換頁、區段切換都交由來處理,從而大大簡化了客戶對存儲器操作的復雜度。
  4. The whole console comprises cpu module, serial port module, i / o port extension module, a / d module, d / a module, led display module and rudder input module, etc. during design and development of usb communication applied to console, characteristic and application of usb, general process of development of usb device have been mainly discussed, part work on hardware and software of usb communication have also been done

    在實際開發工作中,按照單片機應用系統設計思想分階段進行各個子任務的開發調試,然後對整個控制臺系統進行調試,使得該控制臺更好的應用於大型船舶操縱擬器中。在控制臺實現usb通信的設計和開發過程中,主要深入研究了usb的結構特點, usb的應用以及usb設備的一般開發過程,對控制臺實現usb通信的硬體和軟體部分做了部分開發工作。
  5. The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module

    數據採集式實現部分的大部分工作是在前板上完成的,後板主要是一些外圍。前板採集卡上從物理上來說主要有四:符合,數據流控制器, sdram陣列和系統總線組成。後板採集卡從總體物理上主要有四組成: 485串列通信, adc控制,心數據處理和門控信號產生
  6. Secondly the paper introduces data - acquisition module made up of data - acquisition card and interface circuit to realize input and output in real time in the hardware

    其次紹了由數據採集卡和構成的數據採集,為系統的實時輸入和輸出提供了硬體上的保證。
  7. Pointing to the problem of chinese data display of ins pection and measure system of power network quality, an interface circuit betwee n pic18f458 scm and lcd module mgls12864, and designed program were introduced in this paper

    針對網質量檢測系統的中文數據顯示問題,紹了一種利用新型單片機pic18f458與液晶顯示mgls12864構建的硬體和軟體程序。
  8. The accelerometer which has simple fabricated process and high sensitivity and small parasitic capacitance and residual stress is hybrid integrated with the interface circuit using ic nude chip. so the density of the package is increased, and the noise of the sensing system is decreased. these found the base of capacitive accelerometer module using the mcm method

    該傳感器製作工藝簡單,靈敏度高,支撐梁採用u型,減小了刻蝕后的殘余應力,用玻璃作為襯底,減小了襯底和硅可動質量間的寄生容,且把傳感器晶元和用ic裸片製作的集成在一起,提高了封裝密度,減小了傳感器系統的噪聲,為採用mcm技術製作容式加速度傳感器打下了基礎。
  9. The configuration that uses ieee - 13 94 to control a vxi system is introduced. chapter 2 describes the resource manager application of message - based device 13 94 - vxi controller and the mechanism of register - based device arbitrary waveform generator ( awg ). the key technology of interface circuit and direct digital synthesis in awg module is discussed explicitly

    本文先對vxi總線技術進行了概略的紹,在此基礎上,對一具體的vxi寄存器基任意波形發生器進行展開,紹了任意波形發生器與vxi機箱背板總線通訊的部分及波形發生機理的核心部分的直接數字合成技術。
  10. The hardware circuit is designed for the system, including the power module, clock circuit module and jtag interface

    對整個系統的硬體進行了設計,包括相應的、時鐘平轉換和jtag
  11. The task in the paper comprises two parts. the software design procedure works as follow, program the drivers for module on pc with cvi, generate the corresponding ddl and then edit the test serial and invoke the ddl by designing soft panel with vc + + 6. 0. thus facilitate users to control module to conduct high speed data test. the hardware design procedure works as follow, design vxi message based interface circuit and plesio - fdc circuit with fast data transport function on xc2vp30, a virtex - ii pro series fpga chip designed by xilinx company which integrates power - pc processor

    筆者負責的工作包括軟體設計和硬體設計兩部分:軟體設計是用cvi工具編寫在pc機上的驅動程序,生成動態連接庫,再用visualc + + 6 . 0設計軟板,實現測試矢量的編輯和動態連接庫的調用,讓用戶很方便地控制進行高速數據測試;硬體設計是在xilinx公司的一片集成了power - pc處理器的virtex - iipro系列fpga晶元xc2vp30上完成vxi總線的消息基設計和具有快速數據傳送功能的準fdc[ 1 ] [ 2 ]設計。
  12. Consequently, based on the analysis of quad el transceiver working principle and the comparison of various processors " features, the author proposes the hardware design of quad el transceiver, and then introduces the time module, interface circuit of the system, storage system module, four channel el composer module, cpu module and time - interval exchange module respectively

    然後,在分析了四e1收發器的工作原理和比較了各類處理器特點的基礎上,提出了四e1收發器的硬體設計,分別紹了時鐘、系統、存儲系統、四通道e1合成器、 cpu以及時隙交換。接著,在研究分析了g
  13. In this paper, the methodology and implementation with hdl of design based reconfigurable architecture are discussed in detail, which includes the implementations of algorithms circuit, register file with controllable node, decoder, interface and main controller. from the introduction of design process of every module circuit, we can see easily some general feature of vlsi design with hdl

    在此基礎上詳細討論了基於可重組體系結構的密碼晶元設計方法和各實現的結構圖,包括演算法、可控節點寄存器堆、譯碼和主控等。通過對各個設計過程的紹,闡明了使用hdl語言設計超大規集成的一般特點。
  14. Thirdly, it gives a detail about the hardware and the circuit ( single - chip, communication interface circuit, sign input channel and analogous circuit )

    第三,詳細闡述了系統的各硬體(單片機系統、通信、信號輸入通道、源)組成。
  15. The meter ( which is called pccm2002 for short ) is designed on the basis of mcs - 51 single - chip microcomputer technique. the hardware is composed of single - chip microcomputer module and electrochemical module. the single - chip microcomputer module can be divided into five parts, cpu circuit, a / d and d / a circuit, peripheral memory circuit, i / o interface circuit, distributing address circuit ; the electrochemical module is made up of potentiostatic circuit, galvanostatic circuit, potentiostatic - galvanostatic ( p - g ) conversion circuit, signal measuring circuit. the software of the meter is edited by c51 language, it is well - structured and module. all program modules have been linked into an executable files after compiled separately, then copy to eprom

    位控制下的恆量智能化腐蝕監測儀採用基於mcs - 51單片機技術的智能化設計,儀器硬體由單片機系統化學組成,單片機系統包括cpu,片外存貯器擴展數和數( a d和d a ),輸入輸出( i o ),地址分配,各通過系統總線交換信息;化學主要由恆,恆,恆位-恆流( p - g )轉換,信號放大與採集組成。
  16. The test system including power circuit, restoration circuit, pulse circuit, the circuit of the memory ( sram and flash ), jtag interface circuit, the control circuit of the touch - panel, lcd interface circuit

    該測試系統的功能包括,復位,晶振,存儲器( sram和flash ) , jtag,觸摸屏控制, lcd
  17. This paper depend on stanford telecom corporation ' s new spread spectrum chip and intel corporation ' s 87c196 scm, designing correlation peripheral interface circuit and software model block. first of all, this paper designs the twice civil air defense alarm system ' s digital spread spectrum communication with stel - 2000a

    本文以stanfordtelecom公司的最新擴頻產品stel - 2000a晶元和intel公司的87c196單片機為主,設計了相關外圍和軟體。首先本文設計了用stel - 2000a實現二次人防警報系統的數字擴頻。
  18. The thesis also describes the design of the switch hardware, including microprocessor subsystem module, layer 2 / layer 3 switching module, fe interface module, ge interface module and out - band management module. the interface circuits among modules are introduced as well. finally, the thesis estimates the overall structure of the software. the implementation methods described in the thesis are also valuable references for the design of other switches based on other switching chips

    接著文章詳細紹了該款交換機的硬體設計,給出了包括微處理器子系統、 l2 l3交換、 fe、千兆以及帶外管理在內的主要設計實現,對各之間的也作了紹,文章最後對軟體的總體結構進行了分析。
  19. In this paper, mobile terminal ' s hardware design method and correlative details of circuit implement, including chip selection, power supply, gprs module interface circuit, camera module interface circuit and spi0 bus expand uart circuit were introduced

    文中詳細敘述了移動終端的硬體設計方法和實現的相關細節,包括晶元選型,源轉換, gprs模塊介面電路、攝像模塊介面電路和spi0總線擴展uart
  20. This dissertation grounds on the development of pattern i / o module, some key techniques including the design of a register _ based interface circuit and the data generating and sampling circuit are discussed explicitly. on the basis of virtual instrument software architecture, the programme of the instrument driver and application software are discussed detailedly. and some idea and experience developed by the author in the course of debugging and testing the circuit are discussed also

    本文立足於vxi總線自動測試系統圖形i / o的研製工作,在vxi總線系統體系結構基礎上,紹了vxi總線圖形i / o模塊介面電路和數據輸入輸出功能的實現方案;在虛擬儀器軟體構架visa的基礎上,根據測試任務完成了vxi總線圖形i / o儀器驅動器和應用軟體的設計與編寫;對驅動程序調試過程中出現的問題,進行了較深入的分析,並提出了實際的解決措施。
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