模塊處理器 的英文怎麼說

中文拼音 [mókuāichǔlǐqì]
模塊處理器 英文
mmodule processor
  • 模 : 模名詞1. （模子） mould; pattern; matrix 2. （姓氏） a surname
  • 塊 : 名詞（古時佩帶的玉器） penannular jade ring （worn as an ornament in ancient china）
  • 處 : 處名詞1 （地方） place 2 （方面; 某一點） part; point 3 （機關或機關里一個部門） department; offi...
  • 理 : Ⅰ名詞1 （物質組織的條紋） texture; grain （in wood skin etc ） 2 （道理;事理） reason; logic; tru...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 模塊 : camac module,camac
  1. In the paper, we select the embedded micro - processor coldfire 5307 as system core. with it, the central control module is designed, and then be expanded with serial and ethernet circuits

    在方案中，論文選擇嵌入式處理器coldfire5307為系統硬體核心，圍繞它設計了系統的核心控制模塊。
  2. With its introduction of the pentium processor, intel corp. established a new physical design for the memory modules, called the dual inline memory module ( dimm ), which effectively paired the simms in a single package

    隨著奔騰處理器的推出，英特爾公司為存儲器模塊制定新的物理設計，這種模塊叫「雙列直插式存儲器模塊（ dimm ） 」 ，實際上，它是在一個封裝塊內有一對simm模塊。
  3. The double - start positioning system is an all - weather and regional satellite positioning system, developed independently by our country. this paper discusses the cpu implementation of the dispread subsystem in the double - start positioning system to carry out the main control of the system and to finish the information frame processing. the hardware platform we used is based on cirrus logic ' s ep7312 develop board

    在北斗衛星地面用戶機解擴分機的研製中，其主控模塊的設計開發採用目前流行的基於arm架構的嵌入式微處理器設計思想，以cirruslogic公司ep7312嵌入式處理器為核心的片上系統soc設計開發， ep7312處理器是專門為低成本、超低功耗的應用設計的。
  4. Several technologies researched and applied in research of the thesis which includes the technique of electric energy measurement, the remote and automatic reading meter, gprs, embedded system and remote update application in terminal. the system has advantage of execution efficiency, software cubage, and response speed and communication expense

    終端系統的設計基於嵌入式系統，充分利用了嵌入式操作系統的多任務能力、模塊可裁剪能力，嵌入式處理器的速度快、尋址能力強和資源豐富以及gprs網路永遠在線、通信費用低廉等優勢，在執行效率、代碼體積、通信處理能力和經濟效益上都有著強大的優勢。
  5. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  6. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  7. On the basis of familiar with can bus and gsm communication, considering hev ( hybrid electric vehicle ) battery administrative system ' s demand for the host pc monitoring system, i have designed can - rs232 converter gateway to realize transmission the real - time data from can node to rs232 serial port, which is carried out by the project of at89c52 mcu + sja1000 can controller + 82c250 can controller interface. host monitoring software has accomplished real - time datas display, storage, historical datas graph analysis and storage fashion change from access to excel, at the same time, realized important datas transmission remotely with tc35 short message module. system software programs in assembly and vb

    Can - rs232轉換網關採用at89c52微處理器+ sja1000can控制器+ pca82c250can控制器介面實現對can總線節點通訊的監聽，並將其轉換成rs232串口電平發送到pc機串口，同時用siemens公司的tc35模塊和at指令實現現場採集系統重要數據和錯誤信息的短消息通訊。在上位pc機監控系統中，主要完成的是對串口設置的選擇控制、現場採集數據的實時刷新顯示、歷史數據的圖表分析及數據的access數據庫存儲和excel電子表格的轉換。系統軟體採用匯編語言和vb實現。
  8. The designed model is compiled into custom instruction of nios processor via sopc interface, and made up hardware accelerator interface model

    最後將該模塊通過sopc介面編輯成nios處理器的用戶指令，組成硬體加速器介面模塊。
  9. The class provides the knowledge for internalising and externalising an application model ' s data. it enables word processor documents to be embedded within rich text objects

    這個類提供對于內嵌並擴展一個應用程序模塊數據的知識。字處理器文本能夠嵌入在富文本對象中。
  10. After that, based on the datum of the dsp and the correlative chips, the paper designed the key circuit in the data processor module. the design of the interface modules of the control system is the following work. they were the interfaces connecting controller with digital, analog network, and the monitor computer respectively

    接下來，設計了系統的整體結構；研究分析了嵌入式控制系統在進行數據處理時所採用的器件以及dsp和相關的晶元資料之後，確定使用tms320vc5402作為系統的數據處理器，設計了數據處理模塊的部分關鍵電路和dsp的16位並口自舉加載方式。
  11. The structure, function and characteristic with the principle and method of tank gauging system are described. then the structure, principle of the circuit and the main chips of the data processing unit are introduced. after this, the software design of data processing unit including rs - 485 ( modbus ) module, 4 - 20ma analog module, on - off module, rtd module, pulse module, calculation and display module, communication module and neuron chip program module and also the method of resolving the problems which were found at the process of debugging are emphasized

    隨后介紹了現場數據處理器的結構，電路原理，所運用的主要晶元；並重點闡述了作者在課題研究中所作的工作，即現場數據處理器軟體的設計包括八個功能模塊： rs - 485 （ modbus ）模塊、 4 ? 20ma模擬量採集模塊、開關量處理模塊、 rtd信號採集模塊、頻率量採集模塊、計算和顯示模塊、通訊模塊、 neuron晶元中的程序模塊；以及在課題研究和現場調試過程中遇到的問題及解決辦法。
  12. Pll frequency synthesizer is increasingly used in microprocessor systems and communication. with the development of integrated circuits and the emergence of soc ( system on a chip ) technology, it has been a fundamental and very important module in analog and mixed - signal integrated circuits

    鎖相環頻率合成器現在日益廣泛地應用於通訊、微處理器系統中，並且隨著集成電路的發展以及soc技術的出現，其已經成為超大規模集成電路中不可或缺的模塊。
  13. The system is composed of parallel microprocessor interface, spwm generator, deadtime compensation module and pulse blocking module. the pwm pulse signal is automatically generated as soon as the control variables ( s, x ) input from microprocessor

    該系統由并行微處理器介面、 spwm脈沖發生模塊、死區補償模塊和脈沖封鎖模塊組成，可以按照微處理器給定的控制變量、自行產生觸發脈沖。
  14. Overall control module design of a signal processor

    信號處理器全局控制模塊設計
  15. Based on the demonstration in the project target and the technologic support, the hilss is completely constructed, which is a tightly coupled multi - processor system composed of a standard personal computer, a high - performance single chip microprocessor system and a fast - running floating point dsp system. the debugging of the outside ecu will become easier by the friendly graphical user interface, and the high - speed signal transfer through all the parts. besides, the hilss can be expanded conveniently for its modular components

    在這一系統中， pc上位機、單片機和dsp系統通過共享存儲器構成了一個緊密耦合的多處理器平臺，友好的圖形化用戶界面、高速的信息採集和控制響應、模塊化的系統功能構成為外部電控系統的調試創造了良好的開發環境，同時也為系統今後進一步的擴展奠定了扎實便利的基礎。
  16. The paper puts emphasis on research and design of coprocessor algorithm, data path, control path and modules

    本文的重點是協處理器演算法、數據通道、控制通道及其模塊的設計與研究。
  17. Ti ' s tms320lf2407 is selected as core processor in ert, and analog signal is converted by tms320lf2407 ' s internal adc

    Ert模塊選用ti公司的dsp晶元tms320lf2407作核心處理器，模擬量經過調理電路後由tms320lf2407自帶的模數轉換器進行轉換和處理。
  18. Packet transfer unit ( pte ) is one of the most important units of np, which is responsible for packet analyzing and processing

    包傳輸（或包轉換）單元（ packettransferunit ， pte ）是網路處理器中負責ip包協議處理的核心模塊，完成ip包在轉發過程中的分析處理。
  19. In the paper we amply introduce the logical structure and design of software and hardware of the virtual multi - channel instrument system for temperature measurement. applying the object oriented programming ( oop ) method, center control module, transmitter demarcating module, channels and scopes module, data collection and process module, data analyze module, data display module, data redisplay module, print module and the other auxiliary functions are designed, which realize the collection, process, analyze and display of the powerful virtual instrument

    在本文中，作者詳細介紹了虛擬式多通道溫度測試儀系統的邏輯結構和軟硬體設計，運用面向對象（ oop ）的軟體設計方法，通過中心控制模塊、變送器標定模塊、測溫通道和測溫范圍設置模塊、數據採集與處理模塊、數據分析模塊、數據顯示模塊、數據回放模塊、列印輸出模塊和其他輔助功能模塊的設計，實現了對溫度信號進行採集、處理、分析和顯示的功能很強的虛擬測溫儀器。
  20. When this paper introduces the hot swap design and implementation of each level of the gf8516 core router, it puts emphasis on the design and implementation of the hot swap interface board drivers and the hot swap support platform including the common management module of network processors, the hot swap system driver, and so on

    在介紹gf8516核心路由器的各層熱切換的設計與實現時，本文著重介紹了包括網路處理器公共管理平臺及熱切換系統驅動程序等組成部分的熱切換支撐平臺以及熱切換介面模塊驅動組件的設計與實現。
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