模擬綜合 的英文怎麼說

中文拼音 [zōng]
模擬綜合 英文
analog synthesis
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 動詞1. (設計; 起草) draw up; draft 2. (打算; 想要) intend; plan 3. (模仿) imitate
  • : 綜名詞[紡織] (織布機上使 經線交錯著上下分開以便梭子通過的裝置; 綜片) heddle; heald
  • : 合量詞(容量單位) ge, a unit of dry measure for grain (=1 decilitre)
  • 模擬 : imitate; simulate; analog; analogy; imitation; simulation模擬艙 boilerplate; 模擬電路 [電學] circ...
  • 綜合 : 1 (歸在一起; 聯合成一個統一的整體) synthesize 2 (不同種類、不同性質的事物組合在一起) syntheti...
  1. According to the research, the major work done is as following : < 1 > analyzes the symmetric - key encryption algorithm des and dissymmetric - key encryption algorithm rsa, and makes them easy to realize in hardware. < 2 > according to the algorithms and the thought of reconfigurable computing, the dissertation accomplishes the design of 64 - bit des system architecture and the design of 256 - bit ~ 1024 - bit rsa system architecture. < 3 > using the top - down high level design methodology and the hdl language, accomplishes the description of the des / rsa designs, the simulation and the synthesis

    本論文主要的研究工作: < 1 >對現有的對稱加密演算法des演算法和非對稱加密演算法rsa演算法進行分析,使其易用硬體實現; < 2 >基於可重構思想和特點,完成64位des演算法和256位1024位長rsa演算法的可重構硬體的設計; < 3 >採用自頂向下的設計方法,利用hdl語言對des / rsa設計進行功能描述,並完成軟體和布線; < 4 >在可重構計算驗證平臺上進行演算法驗證,並對設計的可重構和設計的進一步優化進行討論。
  2. Fourthly, the theory about fuzzy mathematics is applied to the evaluation on effects of radar eccm, and the fuzzy synthetic models are founded to evaluate effects of radar eccm. using the models, computer experiments are made to testify the feasibility of the methods above

    ( 4 )建立了雷達抗干擾效果評估的評估數學型,重點針對單部雷達對抗單部干擾機的情況,進行了計算機實驗,驗證了該方法的可行性。
  3. Using matlab and its add - ons simulink, through establishing simulation maths model, the paper integrates open chain vector equation ( describing motion restriction ), numerical value simulation ( computing velocity and displacement while given acceleration ) and matrix algebra, etc. to accomplish dynamic simulation for the robot and verifies the results for kinematics of the robot using analysis method, and it establishes foundation for following study for the robot such as kinetics, control, etc

    利用matlab及其附加軟體simulink ,通過建立數學型,開環矢量方程(描述運動約束) 、數值(在加速度已知時計算速度和位移) 、以及矩陣代數等來完成機器人動態,對所研究的機器人運動學分析結果進行驗證,結果基本一致,為機器人的后續研究,如動力學,控制等奠定基礎。
  4. 0. 2 the purples of choosing the topic this thesis aims to the present problems which are existing in the traditional examination method on the construction units ( bidders ) during the invitation of bids it is expected to apply such mathematics methods as fuzzy comprehensive assessment, so as to research the quantitative standards for the pre - examination about qualification and the tenders, assessment and the specific, practical method of their pertains, during the invitation of bids and tenders thus, the market for the invitation of bids and tenders be regulated, and the procedure for the predomination and tenders assessment would be more scientific and operative

    2本論文選題的目的本論文旨在針對目前施工招投標實踐中傳統的考察施工單位的方法所存在問題,通過評判等數學方法,研究工程施工招投標中資格預審和評標中的量化標準以及具體實用的操作方法。以規范招投標市場,並使招投標初審和評標過程更具科學性和可操作性。本課題的研究成果將對我國工程招投標量化管理工作有很強的實用價值。
  5. On one hand, the focal point that the interface circuit is designed lies in lining up the arrangement of the aerial data, have adopted one pair of ports ram to cooperate with the counter and realize the lining up of the data, on the other hand, interface focal point that circuit design transmission of data, part this finish mainly and interface of linkport of dsp, make data transmisst to dsp processor at a high speed, go on follow - up punish

    一方面,介面電路設計的重點在於對天線數據的整理排隊,採用了雙埠ram配計數器實現數據的排隊,另一方面,介面電路設計的重點是數據的傳輸,這部分主要完成和dsp的linkport的介面,使數據高速傳給dsp處理器,進行后續處理。這個項目按照自上而下的設計流程,從系統劃分、編寫代碼、 rtl、布局布線,到fpga實現。
  6. 1 、 through the theoretical analysis and the medici simulation, according to the design directive, the structural parameters are designed comprehensively, including the dopant concentration and the depth of the emitter, the base dopant concentration and the depth ( especially the ge ratio ), the dopant concentration and the depth of the collector

    主要工作是: 1 、通過理論分析和medici設計得出符設計指標的結構參數,主要包括:發射區的摻雜濃度和厚度?基區的摻雜濃度和厚度及基區中ge的組分比?集電區的摻雜濃度和厚度。
  7. We stimuli and synthesis this circuit in the eda tools software. and then give the evaluation of performance

    使用eda軟體進行,根據模擬綜合的結果評價設計性能。
  8. The modern robust design detailed the robust design based on engineering model, which explained the specific design process, the whole process from founding system model to solving it. it obtained the optimum combination of parameters and the maximum manufacturing errors, using fuzzy comprehensive judgment to dispose the problem of many targets, handling the design results by fuzzy probability to increase the reliability of the design. in the end, there supplied an example, the optimization design of a long distance hydraulic cylinder to interpret the specific design process, achieving its optimum combination and the maximum manufacturing errors, and verifying the practicability of the design results by the method of fuzzy probability analysis

    在第二部分的基於試驗設計的穩健設計中,先對傳統的穩健設計,即三次設計(功能設計、參數設計及容差設計)的設計過程及原理進行了分析,指出了傳統穩健設計法中的不足,即沒有充分利用數字計算機的強大優勢;對于多因素多指標的設計,試驗周期長、計算復雜等造成設計周期長、成本高、效率低等缺點提出了改進的措施,即將虛現實技術應用於傳統的穩健設計中,通過糊數學的方法(評判)來處理設計中的多指標問題,使設計達到事半功倍的效果。
  9. An architectural model of diffserv / mpls backbone is proposed to provide reliable, fair - treating qos service in mpls networks. taking mpls as fundamental packet forwarding mechanism, diffserv as qos provisioning model, our framework relizes high quality network service while balancing load across backbone. defining relationship between interserv service type, diffserv service class and exp field of mpls label, the model could also provide efficient interconnecting service between different user networks

    提出一種mplsdffeery骨幹網路型:以mpp為基礎傳輸技術,以dffeery為服務質量控制型,該骨幹網路利用區分路由和前攝式多路路由方法實現對業務量的高質量傳輸和網路負載均衡;通過intersery服務類型、 dffeery服務類和mpde標簽中實驗欄位之間的相互映射,該骨幹網路型實現對多類用戶子網的有效互聯;結果顯示, dffeery mpls骨幹網路型可有效實現端到端的服務質量控制和流量工程目標。
  10. It includes concretely : carrying on multistage fuzzy comprehensive appraisal to every overall arrangement scheme that is drafted in step with the fuzzy comprehensive evaluation assessment, confirming the route overall arrangement scheme optimized ; the optimum seeking result of the scheme, directing against the factor influencing line shape of route according to the overall arrangement of the route, forming these factors according to dominance relation orderly level pass steps structure, and using the analytic approach of the level principle, constructing the comparative judgment matrix among the influence factors ; chasing layer calculate and examining to every key element, carrying on level always arranged in an order, confirming the scheme of optimizing

    具體包括:用評價法對定路線的各布局方案同步進行多級評判,確定優化的路線布局方案;根據路線布局方案的優選結果,針對影響路線線形的因素,將這些因素按支配關系形成有序的層次遞階結構,並運用層次分析法原理,構造影響因素間的比較判斷矩陣;逐層對各要素計算與檢驗,進行層次總排序,確定優化方案。
  11. There are several aspects of work that was done in this thesis mainly. firstly, the theory of the under - water long - range remote control system was analyzed and the remote control instruction code was designed. secondly, decoding circuit of the under - water long - range remote control system was designed with fpga, including vhdl coding, simulation, synthesis, place & route, etc. besides, power consumption to fpga that is designed is estimated in this thesis. lastly, we designed and made one pcb to verify and test fpga decoding chip that is designed, and debugged and tested it finally

    首先,深入研究和分析了在頻域實現水下遠程遙控解碼的原理並進行了遙控指令編碼設計;其次,用altera公司的cyclone系列fpga晶元完成了水下遠程遙控fpga解碼晶元的設計工作,包括硬體描述語言( vhdl )編碼、電路前後和布局布線工作,並對設計的fpga解碼晶元進行了初步的功耗估算;最後設計製作了一塊fpga解碼晶元電路驗證測試板,並完成了電路調試和測試。
  12. We study the relationship of buffer size on crosspoints and system performance

    modelsim 、 ise工具對代碼進行驗證、
  13. The project of developing the core comes from a national key program in science and technologies, study on mcu high level language description and embeded system technology. the project is followed the top - down design way

    這個項目遵循了自上而下的設計流程,從系統劃分、編寫代碼、 rtl、門級,到布局布線、電氣規則檢查、設計規則檢查,網表比較等。
  14. First, the basic raster graphics algorithms for drawing 2d primitives are introduced, including edge coherence and the scan - line algorithm of triangle, brush algorithm of thick line ( and its improved method ) and midpoint circle and ellipse algorithm ; and the current situation of the advanced algorithms is also involved. second, the mapping of high level programming language to hardware description language is described, some principles of the conversion of algorithm to state machine are proposed also ; then, the implementation of basic graphics in hardware is discussed in detail, the state machines are drawn in the paper, and the interfaces of hardware are defined, block diagrams too, and the advanced algorithm of conic is proved ; finally, some issues about test are described, the results of simulation and synthesis are given in the last, and some detailed data are displayed in the appendix

    首先介紹了現有的基本圖形生成演算法,包括三角形邊相關掃描演算法,寬直線的線刷子演算法及其改進和圓形、橢圓的生成演算法,同時介紹了加速演算法的研究現狀;然後,討論了高級語言描述到硬體描述語言的映射,提出了演算法到狀態機抽象的規律;接著具體討論了基本圖形的硬體實現,給出了各演算法的狀態機圖,介面定義和實現框架,並且從理論角度給出了二次曲線加速演算法的證明:最後採用軟體工具進行測試驗證,給出了實現的結果,並在附錄中有詳細的實驗結果數據。
  15. This paper is clued by the design and implementation of fpga and asic, and it expatiates on the subject of pci bus target controller, which involves all processes of design, simulation, synthesis and test, placing and routing

    以fpga和asic的設計和實現為線索,闡述了pci總線目標設備控制器設計、驗證及布局布線的各個步驟,以及基於asic技術的高層次設計方法。
  16. Then has analysed function 、 port joining 、 inside structure of every module, etc. in detail. using hardware description language to program for function implementation, after function simulation 、 synthesis 、 place and route 、 timing simulation and download, the design is implemented in the spartan 3 serial xc3s400 - 4pq208 chips of xilinx. all procedure of design is worked under the ise 6. 2 integrated environment

    接著詳細分析了各塊的功能、埠連接、內部結構等,並利用硬體描述語言編寫源代碼實現各塊功能,經過功能、布局布線、時序、下載等一系列步驟,最終在xilinx的spartan3系列xc3s400 - 4pq208晶元上實現。
  17. After these, the usb host controller was simulated, synthesized and placed and layout by activehdl, synplify and quartus ii

    並分別以activehdl 、 synplify ,和quartus完成了usb主控制器的前後與布局布線。
  18. 3. a cam - based high - speed policy engine has been successfully designed and developed using fpga, result of simulation and synthesis indicates it is able to execute high - speed packet classification preferably under oc - 48 optical network circumstance. 4

    採用fpga晶元設計開發了基於cam的協議引擎原型,后的結果表明它能滿足oc - 48同步光網路對輸入分組進行快速分類的要求。
  19. Monitoring system design of the physical simulator experiment device of the marine power station based on plc

    的船舶電站物理模擬綜合實驗裝置的監控設計
  20. All the modules of risc mcu core were described with verilog hdl and synthesized with high - level synthesis eda tools. then the risc mcu was implemented in fpga device

    所有塊都採用verilog硬體描述語言進行設計描述,使用eda工具進行功能,並在fpga器件上完成了系統的硬體驗證。
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