次邏輯單元 的英文怎麼說

中文拼音 [luódānyuán]
次邏輯單元 英文
secondary logical unit
  • : Ⅰ名詞1 (次序; 等第) order; sequence 2 [書面語] (出外遠行時停留的處所) stopping place on a jou...
  • : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • 邏輯 : logic
  1. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層綜合的研究中,介紹了在深亞微米工藝條件使用的方法和asic設計流程,討論了高層綜合的核心如何從描述推出電路構成的設計思路,針對不同目標的設計技巧討論了採用hdl語言進行系統設計的方法,給出了用vhdl語言進行代碼設計時的規范和風格,在面向soc的驗證策略討論了動態和靜態的驗證技術,提出了進行獨模塊驗證、晶的全功能驗證和系統軟硬體協同驗證的整體策略。
  2. Hence a clear and logic evaluation system is set up from three dimentional indexes, i. e. green landscape unit evaluation, urban or suburban area evaluation and city area evaluation. this system is conducive to a better assessment of greenland ecology

    在此基礎上,根據評價的空間尺度的不同,設立了綠地景觀評價、市區或分區評價、市域評價三個層面的指標,形成一個層分明、關系明確的指標體系。
  3. Firstly, for the purpose of research and verification of multithread microprocessor, a superscalar microprocessor model armp - v2 is built on the basis of armp microprocessor ; secondly, the issue logic is not only the critical path in a superscalar microprocessor, but also critical to the performance of a multithreaded microprocessor with superscalar execution core

    首先,在設計的嵌入式微處理armp的基礎上進行改進,提出了一個超標量處理器模型,用於多線程處理器系統結構的研究與驗證。其,指令發射是超標量處理器中的關鍵路徑,也是制約執行為超標量結構的多線程處理器主頻提高的關鍵因素。
分享友人