段寄存器 的英文怎麼說
中文拼音 [duànjìcúnqì]
段寄存器
英文
segment register-
In linux, all the segment registers point to the same range of segment addresses - in other words, each uses same set of linear addresses
在linux中，所有的段寄存器都指向相同的段地址范圍換言之，每個段寄存器都使用相同的線性地址。Let s look at each of these in detail
下面詳細介紹這些段寄存器。Initializes the segmentation registers and a provisional stack
初始化段寄存器以及一個臨時棧。Initializes the segmentation registers with their final values
以各自的最後值來完成初始化各段寄存器。Every segment register has a “ visible ” part and a “ hidden ” part
每個段寄存器都「可見段」和「隱藏段」兩個部分組成。Other segments can be made available by loading their segment selectors into these registers during program execution
要想使用其它的段，可以在程序運行時把這個段選擇子載入段寄存器中。These instructions change the contents of the cs register ( and sometimes other segment registers ) as an incidental part of their operation
而這類指令在執行時會修改cs （或其它段寄存器）的內容。The fs and gs segment registers are not normally used in application programs but are used in some instances by the operating system
Fs和gs段寄存器不經常被應用程序使用，但是有些時候被操作系統所使用。Memory management is simpler when all processes use the same segment register values when they share same set of linear addresses
當所有的進程都使用相同的段寄存器值時（當它們共享相同的線性地址空間時） ，內存管理更為簡單。The rpl request privilege level defines the current privilege level of the cpu when the corresponding segment selector is loaded in the segment register
Rpl （ request privilege level ）定義了在將對應的段選擇器加載到段寄存器中時cpu的當前特權級別。Then, the course of the development of register allocation strategy is illuminated in detail and a direct priority - based register allocation approach via the analysis and comparison of many improvements to the graph coloring strategy is proposed, it selects the split live range based on the priorities of the spilled live ranges not the priorities of the total candidate live ranges
然後，詳細闡明了寄存器分配策略的演化歷程，通過分析和比較基於圖著色法的各種改進方案，從實現最優分配的角度，在chow和hennessy的寄存器分配方案的基礎上提出一種基於直接優先級的寄存器分配策略，更直接、更具體地根據溢出活躍范圍段的優先級決定切分。The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register
執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。With these data structures, code modules, and system registers initialized, the processor can be switched to protected mode by loading control register cr0 with a value that sets the pe flag ( bit 0 )
當設置好這些數據結構，代碼段以及系統寄存器之後，可以通過設置控制寄存器cr0的pe位（第0位）為1來進入保護模式。Each time a segment selector is loaded on to segment registers, the corresponding segment descriptor is loaded from memory into a matching non - programmable cpu register
每次將段選擇器加載到段寄存器中時，對應的段描述符都會從內存加載到相匹配的不可編程cpu寄存器中。Rtos - 1750 make use of static memory management to implement memory protection provided by page register ' s memory mapping and bpu ( block protect unit ), with which system keep fast reference as well as relatively independence by the technology of strding - mapping. system manages inner interrupt and outer interrupt by priority classing strategy and provides four type timers, which are system timer, software timer, auxiliary timer and real - time timer
系統充分利用1750a提供的頁面寄存器堆的內存映射功能和塊保護單元（ bpu ）提供的存儲器保護功能，採用靜態內存管理方式，既保證了任務之間的相對獨立，又通過跨段映射技術滿足了dcmpofp中的任務快速引用的要求。Intel architectures use a segmented address space in which memory is broken up into 64kb segments, and a segment register always points to the base of the segment that is currently being addressed
Intel架構使用了分段的地址空間，其中內存被劃分成64kb的段，有一個段寄存器總是指向當前正在尋址的段的基址。Otherwise, as a memory component, large - scale register file holds a large number of data, so it requires stronger stability and validity. for memory components, using bist method to make a fault checking is a relatively good choice. but the bist of the multi - port register file is still in early phase of development
另外作為存儲部件，規模大的寄存器文件現場保存量大，需要有很強的穩定性和正確性，而內建自測試是存儲部件進行故障檢測的較佳選擇;但是多埠寄存器文件的測試卻處在初始發展階段，故障模型和測試演算法都有待于進一步完善。Srr : segment register rewrite
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