浮點實數 的英文怎麼說
中文拼音 [fúdiǎnshíshǔ]
浮點實數
英文
floating point real number- 浮 : Ⅰ動詞1 (漂在液體表面) float; drift 2 [方言] (在水裡游) swim Ⅱ形容詞1 (在表面上的) superfici...
- 點 : Ⅰ名詞1 (液體的小滴) drop (of liquid) 2 (細小的痕跡) spot; dot; speck 3 (漢字的筆畫「、」)...
- 實 : Ⅰ形容詞1 (內部完全填滿 沒有空隙) solid 2 (真實; 實在) true; real; honest Ⅱ名詞1 (實際; 事實...
- 數 : 數副詞(屢次) frequently; repeatedly
- 浮點 : [計算機] floating decimal; floating point
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2. a frequency extrapolation scheme is developed to effectively predict radar cross section using floating genetic algorithm based on the geometrical theory of diffraction ( gtd ) model. the threshold discrete fourier transform ( tdft ) is introduced for the data compression in angle domain
在目標散射中心建模方面,我們將浮點型遺傳演算法( fga )應用於實際人工目標的gtd模型參數的抽取,利用所抽取的模型參數完成了雷達散射截面rcs的頻率擴展以及數據壓縮,並利用擴展的數據提高了距離解析度。When the join - structure is suspended, suspension state message between the two suspension points should be exchanged and the digital suspension controller will communicate with the sensor. this function is realized by rs - 485 serial communication
在對搭接結構進行懸浮控制時,兩個懸浮點之間需要實時交換狀態信息,並且傳感器與數字懸浮控制器之間也要傳輸數據,兩類信息交換是通過rs - 485串列通信來實現的。The approximate computation method is used in float point computation of system ' s control algorithms on fixed - point dsp after comparing several methods in respect of running time and program space involved, which attains quick computation besides high precision and implements output voltaic with low harmonic and high control precision of frequency
通過從運行時間和佔用空間等方面比較在定點dsp上實現浮點數運算的幾種方法,並選擇了近似計演算法作為系統控制演算法浮點數運算的方法,在保證足夠計算精度的前提下達到計算的快速性,實現低諧波和頻率控制精度高的輸出電壓。In this paper, a lot of researches and exploration are applied to studying the universality and expansibility of hardware and the arithmetic design and code optimization of software. especially, all of the following arithmetics or conceptions are worked out in the research of software design : self - adaptable compression arithmetic based on dictionary model for data collection system, similarity full binary sort tree, a optimized quick search arithmetic and an improved arithmetic of multiplication in the floating - point operation. and all of the arithmetic are designed with mcs - 51 assembly language. the quick search arithmetic, in which merits of both binary search and sequence search are used fully, are based on the specialty of preorder traversal in similarity full binary sort tree
特別在軟體設計研究中,提出了適用於數據採集系統的數據壓縮演算法? ?基於字典模型的自適應壓縮演算法;提出了類滿二叉排序樹的定義;提出了基於類滿二叉排序樹的先序遍歷特性的最優化快速查找演算法,它充分利用了折半查找和順序查找各自的優點;提出了浮點運算乘法的改進演算法;並在mcs - 51匯編語言層次上對所有的演算法加以實現。A data acquisition system with the following features is realized : ? transmission rate up to 100kbyte / s over usb ; ? system ' s dynamic range as high as 120 db ; ? multi - kind of trigger mode control ; ? sampling rate as high as 100 ksps ; ? 12 - bit a / d conversion accuracy ; ? 32k bytes on - board data memory ; ? the system, which was made up of large - scale electronic chips, is small, light and portable, and suitable for field use
本設計最終實現了一個瞬態信號數據採集系統,它具有以下特點: ?採用usb介面進行高速數據傳輸,傳輸速度達100kbyte / s ; ?採用浮點a / d轉換技術,動態范圍達120db ; ?多種采樣觸發控制方式; ?最高采樣率100ksps ; ? 12位采樣精度: ? 32kb數據緩存; ?使用新型大規模電子器件,系統結構緊湊,重量輕,適合野外作業。In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future
第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計,提出了適合硬體實現的浮點乘除法、加減運算的結構,浮點運算處理器主要用於高速fft浮點處理功能,異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計,在討論可測試性設計策略選擇的問題上,提出了針對不同模塊進行的分別測試策略,提出了層次化jtag測試方法和掃描總線法,提出了基於fpgaThe algorithm and its implementation of the leading zero anticipation are very vital for the performance of a high - speed floating - point adder in today s state of art microprocessor design. unfortunately, in predicting " shift amount " by a conventional lza design, the result could be off by one position. this paper presents a novel parallel error detection algorithm for a general - case lza
目前國際上已有很多演算法對前導0預測演算法進行了研究,但是出於設計方法和延遲等方面的限制,大部分前導0預測演算法都為非精確演算法,其預測結果可能與真實加法結果中前導0的個數產生一位的誤差,這個誤差需要在浮點加法的后規格化過程中進行修正,因此反過來又增加了浮點加減演算法的關鍵路徑延遲。After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper
此外,本文還對處理器的浮點運算單元設計做了初步的研究,以ansi ieee - 754浮點數二進制標準為參考,借鑒了經典的定點加法器和乘法器的設計,嘗試性的給出了浮點加法單元和乘法單元的實現模型和行為級上的硬體描述,並對其進行模擬和驗證。This article deals with the method to determine the guard digit in the left normatlization of float point number in the analysis and design of computer system, and briefly introduces its application in practice
摘要介紹了在計算機系統分析和設計中,用於浮點數左規格化的警戒位的設置方法,並簡要說明了該類警戒位與用於舍入的警戒位共同組成了運算器中的累加器的實際警戒位字長。Any rounding or truncation of floating - point numbers is implementation defined
任何四捨五入或浮點數的捨去是實作自訂的A novel algorithm for decomposing any signal into a linear expansion of elementary functions with a redundant dictionary is proposed
摘要在分析總結浮點數編碼和格雷碼編碼各自特點的基礎上,提出了一種用浮點數和格雷碼混合編碼的遺傳演算法來實現匹配追蹤演算法。Because spca720a does n ' t support float calculation itself, and the color level and the luminance level of every point on tv screen is related with the other 4 point around it, it ' s hard to draw curve and slash. in fact, we choose to draw vertical line and horizontal line the approximate the curve and slash
由於spca72oa本身不支持浮點數運算,並且tv中的每個點與它的色度和周圍的4個點的亮度有關,畫曲線和斜線比較難于實現,所以在實際實現中,我們用畫水平線和垂直線來近似曲線和斜線。The approximate computation method is used in float point computation of system ' s control algorithms after comparing several methods in respect of running time and program space involved, which attains quick computation besides high precision and implements excitation voltage with low harmonic and high control precision of frequency
通過從運行時間和佔用空間等方面比較實現浮點數運算的幾種方法,並選擇了近似計演算法作為系統控制演算法浮點數運算的方法,在保證足夠計算精度的前提下達到計算的快速性,實現低諧波和頻率控制精度高的勵磁電壓。In a floating - point representation, the numeral that is multiplied by the exponentiated implicit floating - point base to determine the real number represented
浮點表示法中的一個數字,該數字乘上隱式的浮點底數的冪就決定了所表示的實數。In a floating ? point representation system, to make an adjustment to the fixed ? point part and the corresponding adjustment to the exponent in a floating ? point representation to ensure that the fixed ? point part lies within some prescribed range, the real number represented remaining unchanged
在浮點表示方法中,調整浮點表示中的定點部分和相應的指數,以保證定點部分處于預先規定的值域內,並使所代表的實數值保持不變。Of course, doubleword integer instructions are not available on 32 - bit implementations, and floating - point instructions are supported only through software emulation on most embedded implementations
當然,在32位的實現上還不能用雙字整數指令,在大部分嵌入式實現中浮點指令也只是通過軟體模擬提供支持。One pencil is the simulative milling cutter. parameters setting, milling cutter radius compensation, graphics drawing of the work - piece machined, realizing local control, etc. are the tasks of pc, while line & arc interpolation, motion segment acceleration & deceleration control, position protection at a high precision rate and so on are the duty of dsp motion controller. in the end, the system can draw the cutter center track of the work piece ' s program track accurately
上位pc機主要完成相關參數設定、刀具半徑補償相關運算及繪制被加工工件的輪廓(程編軌跡) 、實現本地控制等內容;下位機dsp控制器則充分利用美國ti公司的tms320c31浮點dsp的高速度、高精度完成運動控制中的實時直線和圓弧數值插補、運動段加減速控制、運動軸行程限位保護等內容。The proposed approach enables parallel execution of conventional lza and its error detection, so that the error - indication signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. the circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work
本文提出了一種新型的基於錯誤糾正機制的前導0預測演算法,該演算法在傳統非精確演算法的基礎上增加了對其結果出錯時的預判機制和規格化過程中的實時糾正機制,從而實現了尾數和規格化時的精確移位,降低了浮點加減運算的關鍵路徑延遲。The primary contents and innovations of this article are introduced below. in order to take advantage of the high speed of calculation, and at the same time, improve the accuracy and dynamic - range of the algorithm, three kinds of multi - input floating point adder algorithm ( fpa ) are summarized and a high - performance multi - input fpa structure is put forward with a self - defined floating point format. the performance of the high - performance structure on calculation speed and logic resource consuming is better than the normal structure
論文的主要工作及創新點如下:為了充分利用fpga處理速度快的特點,同時盡量提高演算法的精度及動態范圍,本文在對浮點加法器演算法進行深入研究的基礎上,規納總結了三種不同的多輸入浮點加法器演算法,並創造性地提出了一種高效的多輸入浮點加法器結構及一種適合於fpga實現的自定義浮點數格式,這種高效的結構在所需的邏輯資源和運算速度上均遠優于傳統的多輸入結構。Return the calculated value as a double - precision floating point real
將計算得到的值作為雙精度浮點實數返回。分享友人