浮點整數 的英文怎麼說

中文拼音 [fúdiǎnzhěngshǔ]
浮點整數 英文
floating point integer
  • 浮 : Ⅰ動詞1 （漂在液體表面） float; drift 2 [方言] （在水裡游） swim Ⅱ形容詞1 （在表面上的） superfici...
  • 點 : Ⅰ名詞1 （液體的小滴） drop （of liquid） 2 （細小的痕跡） spot; dot; speck 3 （漢字的筆畫「、」）...
  • 整 : Ⅰ形容詞1 （全部在內; 完整） whole; all; complete 2 （整齊） neat; tidy; orderly Ⅱ動詞1 （整理; 整...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 浮點 : [計算機] floating decimal; floating point
  • 整數 : 1. （不含分數或小數的數） integer; whole number; integral number2. （沒有零頭的數目） round number; round figure
  1. Jx5 is a complex microprocessor, which contains cache, microcode rom, instruction prefetch unit, instruction decode unit, integer unit, mmx unit, floating point unit, page unit, bus unit, dp logic, apic and so on. it is very difficulty to test a such complicated microprocessor and receive anticipative fault coverage ratio. so, we must add dft in cpu ’ design

    Jx5微處理器是一款結構異常復雜的微處理器，它的內部包含有: cache 、微碼rom 、指令預取部件和動態分支預測部件、指令譯碼部件、整數部件、多媒體部件、浮點部件、分段和分頁部件、總線介面部件、雙處理器介面部件、可編程中斷控制部件等。
  2. A integrated algorithm of ambiguity resolution is proposed. by using triple carrier phase, integer gauss transformations, qr factorization, cholesky factorization, and geometry constraint, the correlation between ambiguity components is reduced, and more error ambiguity can be discarded, also process of ambiguity searching getting rapidly. the ratio test combining constraint of baseline is used to fix ambiguity rapidly

    利用三差最小二乘求解模糊度浮點解，然後採用整數高斯變換降低模糊度分量間的相關性，再根據qr分解和基線幾何約束減少需搜索的模糊度組合，採用cholesky分解在搜索過程中及早淘汰不正確的模糊度組合，最後利用ratio檢驗與基線幾何約束條件相結合檢驗模糊度組合，盡快固定正確的模糊度。
  3. A processor usually has two sets of general - purpose registers, one optimized for floating - point operations and the other for integer operations

    一個處理器通常有兩組通用寄存器，一組優化為用於浮點運算，一組優化為用於整數運算。
  4. In the constructing of the diagnosis module using the technology of the combination of the fuzzy logic and neural network, which based on the fuzzy adaptive learning control network, a simple kind of capable method for consummate the structure and performance of network is introduced, which includes the rules extraction based on the maximum weights matrix and the parameters amendment based on genetic algorithm by floating - point coding. during the monitoring of the parts condition, the output of the condition monitoring system shows the good working condition of the executing agency by fuzzily deducing from the control instruction send by the auv ' s controller and motion status, and so offers the proof to complete mission and return safely

    在珍斷模塊建模中採用模糊邏輯與神經網路結合的技術，以模糊自適應學習控制網路為核心，提出了一種簡單可行的基於最大權值矩陣的規則提取及基於浮點數編碼的遺傳演算法的參數調整的，完善網路結構與性能的方法，並在狀態監測過程中，通過對由控制器輸入的水下機器人運動控制量以及運行狀態的模糊推理，得到執行部件（推進器或舵）的工作狀態優劣程度，為保證水下機器人完成任務，安全返回提供控制依據。
  5. Programmers often go to some lengths to convert floating point calculations to integer math to increase speed

    程序員常通過將浮點轉換為整數再來進行運算，以便提高運行速度。
  6. If overflow occurs converting a floating - point type to an integer the result

    如果在將浮點類型轉換為整數類型時發生溢出，則返回的
  7. 4. to the situations of short - baseline, a genetic algorithm of search for ambiguity solution with horizontal model is studied

    針對短基線的情況，研究基於平面模型的浮點數遺傳搜索演算法來確定整周模糊度。
  8. Amex86 microprocessor is composed of integer processing unit, float - point processor unit ( math coprocessor ) and protect test unit

    Amex86系統由一個整數處理部件（ cpu ） 、一個浮點處理部件（數學協處理器）和一個保護測試單元組成。
  9. In a floating ? point representation system, to make an adjustment to the fixed ? point part and the corresponding adjustment to the exponent in a floating ? point representation to ensure that the fixed ? point part lies within some prescribed range, the real number represented remaining unchanged

    在浮點表示方法中，調整浮點表示中的定點部分和相應的指數，以保證定點部分處于預先規定的值域內，並使所代表的實數值保持不變。
  10. Fprs are the source and destination operands of all floating - point operations and can contain 32 - bit and 64 - bit signed and unsigned integer values, as well as single - precision and double - precision floating - point values

    Fpr是所有浮點操作的源和目的操作數，可以存放32位和64位的有符號和無符號整數，以及單精度和雙精度浮點數。
  11. Of course, doubleword integer instructions are not available on 32 - bit implementations, and floating - point instructions are supported only through software emulation on most embedded implementations

    當然，在32位的實現上還不能用雙字整數指令，在大部分嵌入式實現中浮點指令也只是通過軟體模擬提供支持。
  12. The div operator performs floating - point division, the mod operator returns the remainder from a truncating division. the floor function returns the largest closest to positive infinity number that is not greater than the argument and that is an integer. the ceiling function returns the smallest closest to negative infinity number that is not less than the argument and that is an integer

    Div運算符做浮點除法運算， mod運算符做求余運算， floor函數返回不大於參數的最大整數趨近於正無窮， ceiling返回不小於參數的最小整數趨近於負無窮
  13. Conversion from floating - point numbers to integer values truncates the number toward zero

    從浮點數向整數值的轉換將向零截斷數字。
  14. Conversions from floating - point numbers to integer values truncate the number toward zero

    從浮點數向整數值的轉換將向零截斷數字。
  15. Convert unsigned integer to floating - point, pushing

    將無符號整數轉換為浮點，並將
  16. This method is especially simple and easy to implement. furthermore, it fully capable of tracking digital control signals carried by 4 ~ 20ma analog signals ; during software development phase, we have completed signal collecting, lcd displaying, d / a converting of hart signal and ieee - 754 32 bit float point conversion. we used a simplified method in ieee - 754 32 bit compatible float point conversion based on the 24 bit integer and 16 bit decimal computation

    在hart信號的解調外圍電路中採用遲滯比較電路實現波形的轉化，這種方法簡單、易實現，完全能夠跟蹤加載在4 20ma模擬信號上的數字控制信號；在軟體設計中，完成了hart信號的採集編程、 lcd顯示編程、 d a轉化控制編程和ieee - 75432位浮點數的轉化編程， ieee - 75432位浮點數轉化編程採用的是在最多滿足24位整數位和16位小數位的基礎上的一種簡化演算法。
  17. The rs64 family leaves things like branch prediction, exceptional floating - point powers, and hardware prefetch to its power3 cousin and focuses instead on exceptional integer performance and large, sophisticated on - and off - chip caches

    Rs64系列將諸如分支預測、浮點處理以及硬體預取之類的問題留給其兄弟power3晶元來解決，自己則專注于整數運算性能和大型復雜的片上、片外緩存的處理。
  18. The compiler has made significant improvements in float to int conversion speed

    。編譯器極大地提高了浮點到整數的轉換速度。
  19. The major tasks include : ( 1 ) expand the schema theorem for ga. the schema theorem with binary coding advanced by professor holland is expanded to limited integer, letter, floating point numbers the number of which value is limited, and their hybrid coding. ( 2 ) put forward replacing by the excellent chromosome ga ( recga ), superiority colony first ga ( scfga ) and improve the ga ; ( 3 ) make probability convergence analysis of recga using the theory of markov chain, random process ; ( 4 ) make convergence analysis of scfga using the principle of contractive mapping in functional analysis theory ; ( 5 ) design the test programs ( cap ) to resolve np problems ( course arrangement ) with gas ; based on recga, modify the arithmetic and then conduct tests

    主要有以下幾方面工作： （ 1 ）將二進制編碼遺傳演算法的模式定理擴展到由有限整數、字母或取值個數有限的浮點數編碼，或它們混合編碼的遺傳演算法范圍； （ 2 ）提出最佳個體替換策略遺傳演算法（ recga ） 、優勢群體優先策略遺傳演算法（ scfga ） ，對遺傳演算法進行改進； （ 3 ）使用隨機過程理論markov鏈對recga進行了收斂性分析； （ 4 ）使用泛函分析理論壓縮映射原理對scfga進行了收斂性分析； （ 5 ）使用遺傳演算法設計了解決np類問題（排課問題）的測試程序（ cap ） ，並根據recga對演算法進行改進並進行測試。
  20. The fundamental types are characters, and integers and floating point numbers of several sizes

    基本類型是各種大小的字元型，以及整型和浮點型數據等幾種類型
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