浮點數文法 的英文怎麼說

中文拼音 [diǎnshǔwén]
浮點數文法 英文
floating-point number grammar
  • : Ⅰ動詞1 (漂在液體表面) float; drift 2 [方言] (在水裡游) swim Ⅱ形容詞1 (在表面上的) superfici...
  • : Ⅰ名詞1 (液體的小滴) drop (of liquid) 2 (細小的痕跡) spot; dot; speck 3 (漢字的筆畫「、」)...
  • : 數副詞(屢次) frequently; repeatedly
  • : Ⅰ名詞1 (字) character; script; writing 2 (文字) language 3 (文章) literary composition; wri...
  • : Ⅰ名詞1 (由國家制定或認可的行為規則的總稱) law 2 (方法; 方式) way; method; mode; means 3 (標...
  • 點數 : check the number (of pieces etc ); count; points; tally點數單 tally sheet; 點數單據 tallying do...
  • 文法 : grammar文法學 grammar
  1. In digital relay, the percentage of noise will increase rapidly with the increase of sampling rate when derivation calculus is substituted by sampled difference term. to solve this problem, a new method using fragment function integrated with the least square algorithm is proposed in this paper. the influence of white noise is greatly reduced and the accuracy of the dead angle calculation is nicely improved after adopting the new method

    字式保護中,如果用差分代替求導將導致噪聲的百分比誤差隨著采樣頻率的提高而劇增,本對此進行了分析並提出了用分段樣條函最小二乘來計算電流波形的導值,以便在提高采樣率的同時降低噪聲誤差的影響,並將其應用於基於32位dsp的新型變壓器保護裝置。
  2. At first, based on the simple genetic algorithm, an improved ga which adopts a combination of emigration policy and adaptive operator is presented. results of numerical optimization show that the improved ga is effective on preventing premature problem

    在基本遺傳演算的基礎上首先研究了編碼遺傳演算值優化中的應用,通過引進「移民策略」和自適應運算元相結合的方,改進了基本遺傳演算在後期進化緩慢的問題,極大地減少了早熟性收斂的現象。
  3. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754標準的運算處理器的設計和異步串列通信核的設一浙江大學博士學位論計,提出了適合硬體實現的乘除、加減運算的結構,運算處理器主要用於高速fft處理功能,異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本所做的驗證測試平臺中的據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計,在討論可測試性設計策略選擇的問題上,提出了針對不同模塊進行的分別測試策略,提出了層次化jtag測試方和掃描總線,提出了基於fpga
  4. After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper

    此外,本還對處理器的運算單元設計做了初步的研究,以ansi ieee - 754二進制標準為參考,借鑒了經典的定器和乘器的設計,嘗試性的給出了單元和乘單元的實現模型和行為級上的硬體描述,並對其進行模擬和驗證。
  5. In chapter one the types and characteristic of ultraphytoplankton are introduced first, then the working principle and protocols of flow cytometry for ultraphytoplankton measurements are also presented. the main purpose of this part is to make good understanding of the works in east china sea and yellow sea

    在第一章中重介紹了超微型游植物的主要類型、特,和流式細胞計檢測超微型游植物的原理與方,本所採用的主要研究方如采樣、測試及據分析等均在這一章中給出,以便對在東、黃海的工作結果有清楚的理解。
  6. The using of correlations in fitness function, the floating - point - number coding function and the two - level evolving process are talked about

    就這個內容,論討論了遺傳演算的適應度函中相關性的引入、編碼方式以及雙層進化過程的採用。
  7. The proposed approach enables parallel execution of conventional lza and its error detection, so that the error - indication signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. the circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work

    提出了一種新型的基於錯誤糾正機制的前導0預測演算,該演算在傳統非精確演算的基礎上增加了對其結果出錯時的預判機制和規格化過程中的實時糾正機制,從而實現了尾和規格化時的精確移位,降低了加減運算的關鍵路徑延遲。
  8. The primary contents and innovations of this article are introduced below. in order to take advantage of the high speed of calculation, and at the same time, improve the accuracy and dynamic - range of the algorithm, three kinds of multi - input floating point adder algorithm ( fpa ) are summarized and a high - performance multi - input fpa structure is put forward with a self - defined floating point format. the performance of the high - performance structure on calculation speed and logic resource consuming is better than the normal structure

    的主要工作及創新如下:為了充分利用fpga處理速度快的特,同時盡量提高演算的精度及動態范圍,本在對器演算進行深入研究的基礎上,規納總結了三種不同的多輸入器演算,並創造性地提出了一種高效的多輸入器結構及一種適合於fpga實現的自定義格式,這種高效的結構在所需的邏輯資源和運算速度上均遠優于傳統的多輸入結構。
  9. This thesis is focused on the following flve topics. first, comparative analysis of binary encoding and float encoding is made, the advantage and disadvantages of two encoding modes and their influence on genetic operators are clarified, thus the basis for reasonable description of the problems is provided. secondly, as genetic operators have an important influence on performance of algorithms, this thesis demonstrates that the simulated binary crossover can keep the mean of population unchanged, and under some conditions

    作者在論期間的工作主要集中在以下幾個方面:對遺傳演算中的二進制編碼和編碼進行對比分析,闡明兩種編碼方的優缺和對遺傳操作運算元的影響,為合理地描述待解決的問題提供一定的依據;遺傳操作運算元對演算的性能有重大的影響,中對模擬二進制交叉運算元對群體的分佈影響進行了分析論證,得出模擬二進制交叉能保持群體的均值,並在滿足一定條件下使群體方差變大的結論;如何保持群體的多樣性,一直是進化演算研究的主要內容。
  10. With the cobol or c file identified, the tool then gives you the opportunity to specify any platform - specific properties such as code page, floating - point format, endian - ness and so forth, as shown in

    標識了cobol或c件之後,工具給您一個機會來指定任何特定於平臺的特性(如代碼頁、格式、尾等) ,如
  11. In this paper we study the parameter self - turning control algorithm and the global asymptotic stability control algorithm aiming at two problems, one is the unstable problem caused by the variable structural parameter, the other is the global asymptotic stability problem caused by drift equilibrium point. maglev train can be regarded as several single point suspending systems based on the mechanical decoupling technology

    針對懸試驗中經常遇到的兩個問題? ?懸系統結構參變化引起系統失穩問題和懸系統受到外界干擾而遠離平衡的全局漸近穩定問題,研究了參自校正懸控制演算和全局漸近穩定懸控制演算
  12. To decrease the area of the chip, resource sharing, which is a synthesized optimized method of eda tools, was used in the project. the code was verified in fpga soft ware environment. synthesized netlists based on fpga and asic were given in the paper for future work

    本課題所設計的微處理器的整單元和單元均採用硬體描述語言vhdl進行建模,為降低晶元面積,將資源共享這一eda工具的綜合優化方應用於設計中,並在現有條件下進行了簡單的fpga驗證,考慮到今後的asic設計,本給出了基於fpga和基於asic的兩種綜合網表。
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