浮點處理 的英文怎麼說

中文拼音 [diǎnchǔ]
浮點處理 英文
fp floating point process
  • : Ⅰ動詞1 (漂在液體表面) float; drift 2 [方言] (在水裡游) swim Ⅱ形容詞1 (在表面上的) superfici...
  • : Ⅰ名詞1 (液體的小滴) drop (of liquid) 2 (細小的痕跡) spot; dot; speck 3 (漢字的筆畫「、」)...
  • : 處名詞1 (地方) place 2 (方面; 某一點) part; point 3 (機關或機關里一個部門) department; offi...
  • : Ⅰ名詞1 (物質組織的條紋) texture; grain (in wood skin etc ) 2 (道理;事理) reason; logic; tru...
  • 浮點 : [計算機] floating decimal; floating point
  1. Firstly, the dissertation expatiate the develop of epu ' s software and hardware. the hardware is a data acquisition system based on the ps multiprocessor architecture

    硬體是以主從式多器結構為核心數據採集系統,主機和從機分別採用ti公司dsp晶元7ms320c31pq和定dsp晶元tms320f240 。
  2. Fpsu is a permanent floating unit moored on the fixed turret spm, provided with raked stem, skeg, non propeller, non rudder, non - propelled and non brackets, and the living quarters utility facility are on bow, the helideck is on top of the living quarters, the process facility is on midship production deck, the flare is on stern, the bow is moored on the yoke of spm turret. it is a newly - built tanker based floating production storage unit

    設有傾斜艏柱船艉設有呆木,無槳無舵,非自航,沒有艉框架,居住艙室和公共設施位於船艏直升機甲板位於居住艙室上方,設施位於船中部的生產甲板上,天然氣放在燃燒塔位於船艉,艏部被系固在單系泊塔的軟鋼臂上,是新造的船型式生產儲油裝置。
  3. With a small specific gravity, light weight, they float on the surface of water ; after oil absorption, they won ' t be deformed, loosened or effected by temperature ; they are able to be acid tolerance, anti - corrosion, easy to store and other characteristics ; they can be widely used for the cleaning machinery manufacturing, aviation, petrochemical and other industries : cleaning of oil stains on water surface, storage cells, bulges, a large amount of other oil stains, the recovery of see surface oil leakage, and preventing the oil leakage from diffusing in tanker, petroleum tanks, oil boxes

    具有比重小,重量輕,於水面,吸油后不變形、不鬆散、不受溫度影響、耐酸堿、不腐蝕、易於儲存等特,被廣泛應用於機械製造、航空、石化等行業油污的清:水面油清除,蓄電池、船腹等大量油污清除,海面漏油回收,油車、油槽、油箱、油桶等漏油防止擴散。
  4. Fpu : floating - point processing unit

    浮點處理單元
  5. Jx5 is a complex microprocessor, which contains cache, microcode rom, instruction prefetch unit, instruction decode unit, integer unit, mmx unit, floating point unit, page unit, bus unit, dp logic, apic and so on. it is very difficulty to test a such complicated microprocessor and receive anticipative fault coverage ratio. so, we must add dft in cpu ’ design

    Jx5微器是一款結構異常復雜的微器,它的內部包含有: cache 、微碼rom 、指令預取部件和動態分支預測部件、指令譯碼部件、整數部件、多媒體部件、部件、分段和分頁部件、總線介面部件、雙器介面部件、可編程中斷控制部件等。
  6. Application : rotary disk vacuum filter is characterized by its simple structure, good adaptability, stable performance, quick dehydration and efficiency of cleaning. it is advantageous in handling a large quantity of suspension with rapid desizing in unit time

    適用范圍:轉臺真空過濾機具有結構簡單、工藝適應性好、運轉平穩、脫水快、洗滌效果好的特,對于脫漿快的懸液,更有單位時間量大的優,特別適用於洗滌要求高,含中粗顆粒料漿的過濾。
  7. According to characteristics of the seismic data from the low snr region with complex surface, this paper is started from solving the static correction problem and reasonable eliminating all kinds of disturbance in the seismic data from the low snr region with complex surface. through the whole process of seismic data processing which includes a series of processing methods that are suitable for the low snr region, namely, from the choosing of the floating base - level, the static correction in the field and indoors, the eliminating of all kinds of noise before and after stacking, the velocity analysis with high - resolution, the reasonable techniques of deconvolution before stacking and wavelet processing after stacking, to the method choosing of the high - resolution stacking and the reasonable and accurate offset imaging, a set of the complete and effective flow for processing seismic data from the low snr region with complex surface are finally formed, which can meet the need of explo

    本文針對復雜地表低信噪比地區地震資料的特,以解決復雜地表低信噪比地區地震資料靜校正問題及合剔除各類干擾為出發,在整個地震資料過程中,從動基準面的選取、野外及室內靜校正、疊前疊后各類噪音的去除、高精度速度分析、合的疊前反褶積及疊后子波技術、到選用高精度的疊加技術及合準確的偏移成像方法等一系列適合於復雜地表低信噪比地區的方法,最終形成一套較完整且有效的針對復雜地表低信噪比地區地震資料的流程。
  8. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754標準的運算器的設計和異步串列通信核的設一浙江大學博士學位論文計,提出了適合硬體實現的乘除法、加減運算的結構,運算器主要用於高速fft浮點處理功能,異步串列通信核主要用於pft器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計,在討論可測試性設計策略選擇的問題上,提出了針對不同模塊進行的分別測試策略,提出了層次化jtag測試方法和掃描總線法,提出了基於fpga
  9. Functions were added to allow access to and control of the floating point control word on both the x87 and sse2 floating point processor

    函數,以允許對x87和sse2浮點處理器上的控制字的進行訪問和控制。
  10. On the one hand it is important for the design of floating - point processor unit to optimize speed while algorithms of high - speed are introduced. for examples, two - path of high - speed floating - point addition, booth coding of floating - point multiplication. srt of floating - point division and square root, cordic of transcendental function and so on

    一方面浮點處理部件設計重在於速度的優化,所以採用優化的高速演算法,如加法的two - path 、乘法的booth編碼、除法和平方根的srt演算法以及超越函數的cordic演算法等。
  11. Different with traditional microprocessor which solves floating - point normalization with soft ware, the project implemented floating - point normalization with hard ware. the research focused on the architecture of microprocessor mainly

    因本課題意在實現微器的基本結構,並未涉及到編譯器,因此在對微器的浮點處理單元的規格化演算法進行深入分析的基礎上提出了用硬體實現單元規格化的方法。
  12. Most risc processors have faster floating point multiply operations than integer ones

    我見到這樣一句話,你的risc器是啥?確定沒有浮點處理嗎?
  13. Amex86 microprocessor is composed of integer processing unit, float - point processor unit ( math coprocessor ) and protect test unit

    Amex86系統由一個整數部件( cpu ) 、一個浮點處理部件(數學協器)和一個保護測試單元組成。
  14. The rs64 family leaves things like branch prediction, exceptional floating - point powers, and hardware prefetch to its power3 cousin and focuses instead on exceptional integer performance and large, sophisticated on - and off - chip caches

    Rs64系列將諸如分支預測、浮點處理以及硬體預取之類的問題留給其兄弟power3晶元來解決,自己則專注于整數運算性能和大型復雜的片上、片外緩存的
  15. Linux for pseries is especially compelling for solutions requiring a 64 - bit architecture or the high - performance floating - point capabilities of the power processor

    對于需要64位體系結構或power器的高性能浮點處理能力的解決方案來說, pseries上的linux非常具有競爭力。
  16. The research work of this thesis mainly includes : research of floating point algorithm, including addition, subtraction, multiplication, division, evolution and cordic ( coordinate rotation digital computer )

    ?對powerpc603e浮點處理單元( fpu )中採取演算法的進行選擇和驗證,主要包括:改進的booth演算法和goldschmidt演算法。
  17. Since the reference open source codes are written in float ansi c language, while the target processor just has the effort to cope with fixed point operation, a formal modeling method must be applied to developed a set of fixed point ansi c code, and transfer the dsp application developing procedure into a traditional way. the fixed point toolbox within matlab is adopted to play this role

    鑒于目標器只有定能力,而ilbc演算法的參考實現源代碼是ansic代碼集。總的實現方案採用了matlab定工具箱作為建模的工具,通過建立了完整的演算法定模型實現到定的轉換,並進一步開發出了定ansic代碼集。
  18. Optimized 32 64 - bit floating - point unit, conforming to ieee - 754 standard

    浮點處理單元,遵循
  19. The power2 added a second floating - point unit and more cache

    Power2晶元中新加了第二個浮點處理單元( fpu )和更多緩存。
  20. In the last chapter, implementing the location algorithm by dsp and fpga is the main work. the programs of location and fitting of flight path are designed in visualdsp + + environment, the interface control module with cpci is implemented by fpga

    本論文選用adi公司的高性能浮點處理器adsp - ts101實現無源定位硬體電路模塊,並利用其軟體開發平臺visualdsp + +開發了相關的定位演算法,用fpga編程實現了dsp模塊與主機cpci介面相連。
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