源寄存器 的英文怎麼說

中文拼音 [yuáncún]
源寄存器 英文
source register
  • : 名詞1. (水流起頭的地方) source (of a river); fountainhead 2. (來源) source; cause 3. (姓氏) a surname
  • : 動詞1 (存在; 生存) exist; live; survive 2 (儲存; 保存) store; keep 3 (蓄積; 聚集) accumulat...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  1. Focus on the method of driver usb device in labview develop environment, three ways ( i / o, cin, clf ) were discussed, and the way of using visa ( visual instrument software architecture ) to communicate with usb device was used that can easily develop instruments driver and application software and improve the applicability of instruments on various operating systems

    並重點分析了常用的labview開發環境下驅動自製數據採集卡的三種方式:直接訪問方式;調用c語言代碼方式;調用動態連接庫函數的方式。提出了利用visa ( visualinstrumentsoftwarearchitecture )來直接驅動usbraw設備,簡化驅動程序和虛擬儀軟體的開發難度,提高儀在多種操作平臺上的通用性。
  2. This converter includes not only analog parts such as the bandgap voltage reference, voltage pump, sample / hold unit, one bit comparator of high precision, multiply - by - two and difference unit, but also digital parts such as register and multiplexer. so the design of this type of converter is mixed signal design

    模數轉換的內部電路包括基準、降壓模塊、抽樣保持電路單元、高精度的1bit比較、倍乘作差單元等模擬電路模塊,以及組、選擇等數字電路模塊,屬于數模混合電路。
  3. In chapter 4, the circuit of the carrier synchronization unit is implemented on fpga, the resistor transistor logic ( rtl ) schemes are presented

    第四章在fpga平臺上實現載波同步單元電路,並給出了實現后的fpga資消耗、傳輸邏輯( rtl )原理圖。
  4. Controlling system is composed of drive circuit, locking memory, shift register. temperature compensating circuit and drive power circuit are also needed

    控制系統是由驅動電路、鎖、移位等組成,此外還需要溫度補償電路和驅動電電路,本文對控制系統進行了詳細的論述。
  5. Sets the destination to the lower of the values in the two source registers

    將兩個源寄存器的低位值放到目的中。
  6. Rat register alias table. during resource allocation the renaming of logical to physical registers is performed here

    別名表。當資再行分配時,對物理進行邏輯的重命名。
  7. Qe1 achieve the whole synchronization by software and hardware. during the course of the initialization of the qe1 system, the chip pm4354 can accomplish the task of synchronization of bit, frame and multiframe after the chip initialization by the software. after pm4354 accomplishes the bit synchronization, qel will read the status registers of the pm4354 to get the status of each el circuit and choose recovered clock of the specified the el circuit as the external timing source of the whole htc - 5200an equipment

    Qe1系統在系統初始化時,通過軟體完成對硬體晶元pm4354的初始化工作后,便可利用該晶元完成4路e1的同步(位同步、幀同步和復幀同步) ;在pm4354完成時鐘提取的任務后, qe1通過不斷地訪問pm4354的狀態,獲得每路e1的狀態信息,在時鐘的選擇原則下,選擇指定e1線路的恢復時鐘作為整個htc - 5200an節點設備的外部參考時鐘,從而解決了htc 5200an的中繼板卡由e1變為qe時所帶來的網同步時鐘
  8. Some variations of this instruction format use portions of the target and source register operand specifiers as immediate fields or as extended opcodes

    這一指令格式的一些變種使用部分目的和源寄存器操作數說明符作為立即欄位或作為擴展的操作碼。
  9. A typical calculator chip from rcl semiconductor inc, c9821, is referenced and developed. the chip of the calculator consists of several function units such as rc oscillator, power management module, microprogrammed control unit ( mcu ), register group, lcd driver and keyboard interface

    在硬體方面,在完成計算的功能模塊劃分的基礎上,對包括rc振蕩、電模塊、 lcd顯示驅動模塊、鍵盤介面、組、微程序控制在內的各個功能模塊的系統結構和電路原理進行了分析,掌握了它們的設計方法。
  10. In the dissertation, we discuss the issues on loop unrolling, register allocation, and cost model, etc. some of the achievements are applied to the implementation of an open source compiler

    本文結合epic體系結構特性,對軟體流水技術中的循環展開、分配、開銷模型和決策框架等領域進行了研究,並將其中一些成果應於一個開放碼的編譯,取得了比較好的效果。
  11. The microprocessor instruction code must have some bits to identify every possible source register and destination register.

    微處理機的指令代碼就必須要有若干位,以便能夠識別出每個可能的源寄存器和每個可能的目的地
  12. Due to the development of 1c technology, now a complex system can be integrated in a chip called system on chip ( soc ). the design of soc needs new design methodologys and modeling tools. systemc is an open c + + modeling platform promoted by the open systemc initiative, which consists of a well defined set of c + + classes and a simulation kernel, supporting design abstractions at the register - transfer, behavioral, and system levels. the advantages of systemc include the ability for hardware - software co - design, the ability to exchange ip easily and efficiently, and the ability to reuse test benches across different levels of modeling abstraction

    系統級晶元的設計需要新的設計方法和建模工具。 systemc是osci ( opensystemcinitiative )組織制定和維護的一種開放碼的c + +建模平臺,它由一個定義良好的c + +類庫及模擬內核組成,支持對系統進行傳輸級,行為級和系統級的描述。 systemc的優點包括對軟硬體聯合設計的支持,更高效和方便的進行ip交換,以及在不同的抽象模型間復用測試基準的能力。
  13. With respect to a program, to temporarily discontinue execution while retaining storage and register contents to permit restoring it when conditions of system loading or resource availability permit

    該術語是對程序而言的,指臨時中斷程序的執行,但保留中的內容,以便當系統負載狀況或資情況允許時恢復程序的運行。
  14. To implement dynamic binary translation effectively, several optimized methods come up in this thesis : efla algorithm to enhance the efficiency of emulating the condition code of the source platform on target platform ; two algorithms to handle the active and passive exception in application level ; and a translation - guided algorithm for register allocation

    針對動態二進制翻譯,本文提出了若干種優化方案:提高在目標機上模擬標志位效率的efla演算法;處理應用級主動異常和被動異常的兩個演算法;翻譯制導的優化演算法。
  15. A switch ic for analog signal processing is designed and implemented, which can fulfill the functions of sampling, weighting, controlling and summing of high frequency analog signals. the circuit consists of three parts : four channel analog switches, a voltage reference and the control circuitry. each analog switch is comprised of two high - transconductance n - mosfets with high w / l ratio, which realize the fine tuning and coarse tuning of the input signal respectively

    本文研究並設計了一種可對高頻信號進行取樣、加權、控制、疊加的模擬信號處理丌關集成電路,它包括模擬開關、電壓基準和移位三個功能模塊,通過兩個高寬長比的高跨導nmos晶體管實現權值的粗調和微調。
  16. Some variations of this instruction format use portions of the target and source operand specifiers as immediate fields or as extended opcodes

    這一指令格式的一些變種使用部分目的和源寄存器操作數說明符作為立即欄位或作為擴展的操作碼。
  17. This instruction format provides up to three registers as source operands, and one target operand

    這一指令格式提供至多三個作為操作數,以及一個目的操作數。
  18. This instruction format provides up to two registers as source operands and up to two target operands

    這一指令格式提供至多兩個作為操作數,至多兩個目的操作數。
  19. This instruction format provides up to two registers as source operands, one immediate source, and up to two registers as target operands

    這一指令格式提供至多兩個作為操作數,一個立即,至多兩個作為目的操作數。
  20. Chapter 3 focuses on translating the c code into assembly code. the implementation and optimization involves issues of assignment of variables and memories, pass of function parameters, addressing modes, control of nested repetition, use of ar registers, pipeline conflicts, and so on

    本文從改寫c碼為c54x匯編代碼著手,對實現過程中的變量儲區分配、參數的傳遞、尋址方式的選擇、循環的嵌套與控制、輔助的使用、流水線等方面的問題進行了設計和優化,在c54x上實時實現了g . 729a聲碼
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