溢出寄存器 的英文怎麼說

中文拼音 [chūcún]
溢出寄存器 英文
overflow register
  • : Ⅰ動詞(充滿而流出來) overflow; spill Ⅱ形容詞(過分) excessive
  • : 動詞1 (存在; 生存) exist; live; survive 2 (儲存; 保存) store; keep 3 (蓄積; 聚集) accumulat...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 溢出 : overflow; spill over; runoff; runout; transfluence; spilth; superfusion
  1. This register contains carry and overflow information from integer arithmetic operations

    這個放整數運算操作的進位以及信息。
  2. Then, the course of the development of register allocation strategy is illuminated in detail and a direct priority - based register allocation approach via the analysis and comparison of many improvements to the graph coloring strategy is proposed, it selects the split live range based on the priorities of the spilled live ranges not the priorities of the total candidate live ranges

    然後,詳細闡明了分配策略的演化歷程,通過分析和比較基於圖著色法的各種改進方案,從實現最優分配的角度,在chow和hennessy的分配方案的基礎上提一種基於直接優先級的分配策略,更直接、更具體地根據活躍范圍段的優先級決定切分。
  3. Here a delaying - allocation optimizing strategy is proposed, it adopts a coarse - grained adjustment of the stack frame. at the call site allocations, the caller ’ s stack frame is reduced according to the actual usage while the callee only be allocated a limited stack frame, consequently, the potential spill is reduced to the best advantage

    本文提一種基於延遲分配的棧分配策略,為了減少額外代價,採用粗粒度的棧幀調整策略,在調用點處使用alloc指令調整調用者的棧幀大小,並為被調用過程分配部分棧幀,在調用點處從調用者和被調用者兩個角度盡量縮減各自的棧幀,從而減少棧幀的
  4. Many traditional optimizations such as register allocation optimizations are able to reduce the energy consumption indirectly while reducing the executed instructions. for instance, the improvements to the code generation techniques for the register stack can reduce the register saves and restores, further reduce the energy consumption and the execution delay

    例如在itanium中,對棧分配的優化,可以減少rse ( registerstackengine )的和填入操作,從而減少了處理的等待時間,同時,降低了指令執行帶來的功耗。
  5. Analyzing every part ’ s function and characteristic, i improve overflow control unit ’ s design technique to suit fpga design and traditional register exchange survivor managing algorithm. the system use input clock as system clock and use parallel structure in system to provide flexible speed

    採用適合fpga特點的控制設計方法;改進傳統的交換法re ( registerexchange )的倖路徑管理設計方法;全系統採用輸入數據的同步時鐘作為系統時鐘,系統內部採用全并行的方式,以提供靈活的速度。
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