硬線邏輯 的英文怎麼說

中文拼音 [yìngxiànluó]
硬線邏輯 英文
hard wire logic
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 線 : 名詞1 （用絲、棉、金屬等製成的細長的東西） thread; string; wire 2 [數學] （一個點任意移動所構成的...
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 邏輯 : logic
  1. At the same time, it also illustrates the superiority of this kind of communication by introducing the profibus field bus. take the transformation of focke packaging machine as an example, the main content is as follows : 1st, to analyze the plc control system of s5 series, and determine the concrete functions that the new plc control system hopes to achieve as well as how to achieve the goal through studying the work program of the original one ; 2nd, to demonstrate the advantage of the field bus in the process of digital alternation by introducing the principle agreement of field bus profibus ; 3rd, to achieve each function of the original control system through using siemens ' s plc control system in the design of hardware and step 7 in the software as well as designing and compiling control system of focke packaging machine ; 4th, to use fm455 for controlling temperature not only can meet the system ’ s severe request for temperature and efficiently avoid many demerits of the temperature control instrument but also can bring convenience for operation and maintenance ; 5th, to use the intouch configuration software to compile monitor and control program can accomplish the goal for real - time surveillance and control of the production line, while setting some parameters can provide a powerful alarming function

    以改造focke包裝機為例，主要內容如下: 1 、通過熟悉原有控制系統的工作流程，分析了原s5系列可編程邏輯控制器的控制系統，確定新的可編程邏輯控制器控制系統需要實現的具體功能以及其實現方法; 2 、在本系統數據交互中，通過介紹profibus現場總線原理協議，論述了現場總線在工業通訊中的優點; 3 、下位機硬體設計上使用西門子可編程邏輯控制器控制系統，軟體平臺採用西門子step7 ，設計和編制了focke包裝機控制軟體，實現了原有控制系統的各項功能; 4 、本系統對溫度要求嚴格，採用溫控儀表控制溫度不能滿足系統要求，而且溫控儀表操作和維護都不方便，因此採用fm455溫度控制模塊進行溫度控制，滿足了系統對溫度的要求，同時又有效地避免了溫控儀表在操作和維護上的缺陷; 5 、在監控系統上，使用intouch組態軟體設計了系統的監控界面，從而實現了對生產線的實時監控，並且可以通過界面設置系統的一些參數，同時提供了較強大的報警功能。
  2. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. The hardware has two input channels of high - speed analog signal, with the signal amplitude of 0 - 5v, the conversion precision of 12bits, and the maximum sampling rate of 400ksps. this system includes 4 dsps ( adsp 2181 ), which can be arranged as a pipe line processing array. many algorithms can be realized in this system

    系統硬體有兩路模擬數據採集通道，模擬信號輸入范圍為0 ? 5v ，轉換精度為12位，最高采樣率400ksps ；系統包含4片dsp （ adsp2181 ）構成的流水線型的處理陣列，可用於實現各種演算法；系統的控制邏輯由fpga完成。
  5. On basis of the development of modern control technology and apply of the network technology and locale bus - mastering technology ， this text analyzes the essential element for produce of wire - roll mill : principle of assign for speed ; expatiates in detail on the network structure and communication protocol of ethernet and profibus - dp ; concretely describes the forms of control system configuration ， the function and features of its software and hardware designs ; also, introduces mainly control function of control system, ， for example ， sequence control 、 loop control 、 fly shear control and operation and monitor function etc

    基於現代控制技術的發展、網路技術以及現場總線技術的應用，本文分析了線材生產的基本要素：速度的分配原則；分析了工業以太網ethernet和現場總線profibus - dp的結構和通訊協議。主要說明plc控制系統的組織結構形式，系統的軟硬體設計的功能和特點。同時，詳細介紹了控制系統的主要控制功能，如邏輯控制、活套控制、飛剪控制以及操作監控功能等等。
  6. Hardboiled novels are different from " cosies " in that they are not so focused on the mystery as a logic puzzle of clues

    和「舒適推理小說」不同的是，硬漢小說沒有特別注重於作為線索的邏輯迷題的神秘事件。
  7. The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block

    設計的riscmcu採用14位字長指令總線和8位字長數據總線分離的harvard結構和二級指令流水設計，並使用硬布線邏輯代替微程序控制，加快了微控制器的速度，提高了指令執行效率。
  8. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  9. Therefore, it can be named by “ the specific demultiplexer of sdh ”. the design of pos line card was discussed and we also have finished the control logic of the hardware platform of the specific demultiplexer

    論文主要討論專用分接器的pos線卡設計和硬體平臺的控制邏輯電路設計與實現。論文首先對基於fpga的10gbps的pos線卡的設計方案進行了研究。
  10. Describes the design and realization of partial run - time reconfigurable fpga in detail. in order to reduce the affect of the reconfiguration time on system execution time, mostly static circuit design method in logical design stage and incremental routing method in component implementation stage are proposed. the fft parallel processing algorithm is examined through vvp platform

    本章詳細闡述了基於vvp平臺的多sharc功能插板的具體硬體實現，以動態重構fpga設計為核心，論述了局部動態重構fpga設計流程和方法，提出了極大靜態電路邏輯設計方法和遞增式布線方法，以達到減小動態重配置時間，提高系統運行效率的目的。
  11. The hardware of the system is composed of a high - speed optical - isolator circuit, a first - in / first - out dual - port memory buffer circuit, a pci interface chip ql5032, and a logic control circuit

    系統的硬體部分是由高速光電隔離電路，雙埠fifo存儲緩沖電路， pci總線介面電路ql5032及邏輯控制電路等組成。
  12. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點，在對目前微機勵磁控制器分析基礎上，提出採用dsp控制器晶元作為核心處理器的微機勵磁控制器的解決方案，運用復雜可編程邏輯器件cpld晶元實現可控硅同步脈沖觸發單元，並簡要說明了verilog硬體描述語言和數字脈沖形成邏輯的方法，通過電路數字模擬對所設計的數字觸發單元進行了驗證。
  13. The basic working principles and characteristics of srm will be described firstly in this paper, as well as its developing survey and researching directions. and then the srd system will be separated into several function parts to be introduced respectively in details : ( 1 ) to analyze the basic characteristics of the srm including electromagnetism, current and torque of every angle field of the rotor based on the subsection - linearized inductance characteristics of stator windings and several idealized supposes. ( 2 ) how to design and realize the h - bridge converter, and the method to use it ; ( 3 ) how to design and realize the controller based on dsp ( tms320f240 ) and the control strategies, as well as the program ; ( 4 ) to introduce the monitor program running in a pc, which is programmed by delphi

    本文首先介紹了srm的基本工作原理和特點以及srd系統發展概況和研究方向，然後以srd的功能構成為線索分部分進行介紹： （ 1 ） srm的特性及控制策略分析，在電感分段線性化等簡化條件下分析得出了各個轉子位置角度區間的電磁、電流和轉矩特性並分析了控制策略； （ 2 ）分析設計了h橋式功率變換器的設計和工程實現的方法，並設計了基於這種功率變換器的換相邏輯； （ 3 ）分析設計了以dsp為核心的控制器以及控制方法，並介紹了該控制器的軟硬體實現； （ 4 ）介紹了如何用delphi編制實現上位機監控程序。
  14. The soft core design of 16 - bit microprocessor realizes all the required functions, which are verified with fpga test bench ( for example, the controller is implemented with hard - wired logic ). with the design of the microprocessor some design ideas are implemented and some valuable experiences are accumulated

    本文是對微處理器設計中一些設計思想的實現（如採用硬布線邏輯來實現微處理器控制器） ，並積累了一些寶貴的設計經驗，可為其他設計提供有益的參考。
  15. The system uses the permanent magnet synchronous machine as the driver motor based on the idea of polygonal flux linkage locus and the permanent magnet brush - less motor is as the momentum balance motor by means of speed and current loop in order to track driver motor precisely and rapidly. the harmonious control of driver motor and balance motor is realized by making full use of the dsp hardware resource and complicated programmable logic device. the software design is composed of c and assembly language to realize motor control arithmetic of polygonal flux linkage locus

    衛星天線伺服控制系統以正弦波永磁同步電機作為驅動電機，採用多邊形磁鏈軌跡法（電壓空間矢量法）的控制策略；動量平衡電機採用永磁無刷直流電機，通過電流環、速度環達到快速、精確跟蹤驅動電機的目的，確保了衛星姿態恆定；設計方案中充分利用了dsp硬體資源和復雜邏輯陣列實現了驅動電機和平衡電機的協調控制，並通過c語言和匯編語言的混合編程實現了電機的多邊形磁鏈軌跡控制演算法。
  16. The important part in photoelectric transform circuits is design of driving circuits and signal processing circuits about linear ccd. the time order driving circuit of ccd are designed and debugged with cpld ( complicated programmable logic device ), which make the whole driving circuit ' s volume very small, shorten design period, modify design at any time, and enhance reliability and agility of circuit

    在設計過程中，採用了一種復雜可編程邏輯器件（ cpld ）設計線陣ccd驅動脈沖電路的新方法，只對器件進行重新編程，在不改變任何硬體的情況下，就可以實現驅動器的更新換代，非常適合線陣ccd脈沖產生電路的設計研究，具有高集成度、高可靠性、開發時間短、投資少等優點。
  17. The programmable logic device is programmed and simulated vvith max + plus ii of altera corporation, and the program is down loaded to the device through byteblaster parallel port dovvnload cable

    可編程邏輯器件由altera公司的max + plus編程並模擬，由所製作的並口傳輸電纜線下載到硬體。
  18. In the first part of this paper, different kinds of usual network architecture of parallel - processing multi - processors are studied. based on adsp - 21160 serial digital signal processors from ad company, close - coupled flexible hardware network architecture is selected as the network architecture of the system, because of which the hardware logical architecture of the system can be recomposed on line according to the acquirement of different algorithms

    本文第一部分研究了各種常見的并行處理網路結構，基於ad公司的adsp - 21160系列數字信號處理晶元，選擇緊耦合的柔性硬體結構作為該系統的并行處理結構，使得系統的硬體邏輯結構可以根據演算法的要求在線重組。
  19. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ，其它ram則利用微碼rom中的微程序進行測試，而微程序的運行則可以順帶覆蓋其它數據通路，從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計，除必備的幾條邊界掃描指令外，還提供了debug 、 runbist等指令以支持內部故障測試、在線調試及內建自測試;內部掃描採用部分掃描策略，選擇邏輯部件的邊界及用戶關心的系統寄存器進行掃描，從而實現了硬體邏輯劃分，方便了后續的測試碼產生和故障模擬，並為在線調試打下了基礎。
  20. The research of this task comes from key projects in scientific research of the tenth " five - year plan " ( ( the technology of color spray - paint graph plotter for military use ) ). a further study has been made of pci2. 2 bus protocol, and a theoretical summarization of the protocol needed in the design of pci system is presented from the viewpoint of engineering application. on the basis of a good knowledge of pci bus protocol, this paper suggests a new method of data transmission based on pci on high - speed spray - paint graph plotter, and then designs hardware logic according to the methed, puts pcb board into practice. finally, the wdm drive progam of the hardware device is designed

    論文深入研究了pci2 . 2總線協議，並在工程角度上對pci總線協議中項目相關的協議的進行了理論總結。本論文在深刻理解pci總線協議的基礎上，提出了高速大幅面新一代彩色噴墨繪圖機上基於pci數據傳輸技術的一種新穎的解決方案，並基於這種方案設計出硬體邏輯，實現pcb板，最後設計出該硬體設備的wdm驅動程序。本文在設計硬體邏輯時，擺脫了傳統設計思路，應用了一種新穎的設計方法，應用了quicklogic公司的嵌入式可編程介面晶元q15030來完成介面晶元設計。
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