硬體存儲系統 的英文怎麼說

中文拼音 [yìngtǐcúnchǔxìtǒng]
硬體存儲系統 英文
hardware memory system
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 體 : 體構詞成分。
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 儲 : Ⅰ動詞（儲藏; 存放） store up; save; keep [have] in reserve Ⅱ名詞1. （繼承人） heir 2. （姓氏） a surname
  • 系 : 系動詞（打結; 扣） tie; fasten; do up; button up
  • 統 : Ⅰ名詞1 （事物間連續的關系） interconnected system 2 （衣服等的筒狀部分） any tube shaped part of ...
  • 硬體 : hardware
  • 存儲 : [計算機] memorizing; storage; memory; store
  • 系統 : 1. （按一定關系組成的同類事物） system 2. （有條理的;有系統的） systematic
  1. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  2. But, the former is not so easy, especially the anomalous plane. this paper plans to design a planimeter to solute this problem

    本系統設計至少要包括單片機存儲器及i o擴展，人機通道，前向通道及後向通道的的軟硬體設計。
  3. According to this idea, this paper first introduces the basic technology to design the instrument. it includes the theory of the laser, measures to survey distance with laser, the theory of the step - motor, subsection technology of the step - motor, the working theory of the single - chip, expansion of the single - chip orderly. the following are the design of the control system of the planimeter according to the principle of the context. it consists of two parts

    最後根據前文介紹的知識先對單片機控制系統進行了硬體電路框圖設計，依據夠用原則對元器件、設備的選擇進行計算、說明、選定，使系統成為擁有完整的包括a d採集、數據存儲器、 8155擴展的鍵盤顯示、 p1口及8155的pa口輸出控制的單片機硬體控制系統電路。
  4. Aiming at the function and performance limitations of traditional special cnc or current pc - based open - structure cnc, a brand - new cnc platform designing scheme of multi - layer open - architecture is presented, based on embedded - mcu calculation and management core, and three kinds of expanding mode of software, hardware and interface. by using double system working ram and boot rom technology, an independent re - development interface is set on the hardware platform to realize customized function ’ s simulations and verifications online, which makes all the expanding or re - configuring on basic cnc platform are all safe and restorable

    本文針對傳統專用數控系統的結構封閉、交互形式不通用和配置擴展不靈活方面的劣勢以及當前pc模式開放結構數控的體積龐大、開放程度不高和實時可靠性不強的局限，創新性地提出了以基本cnc框架+軟體、硬體和介面三種擴展形式為特徵的層次化開放結構的嵌入式cnc硬體平臺，並採用雙存儲區技術進行了cnc系統在線模擬校驗機制和安全保護機制的方案設計。
  5. In this paper, hardware / software codesign is used to solve die problems

    本文採用軟硬體協同設計的思想來進行md32存儲系統的設計。
  6. The hardware of the monitoring system mainly consists of the dsp controller, nonvolatile memory, led, clock management, keyboard interface, sci communication units and can communication units

    系統的硬體部分主要包括了dsp微處理器的基本外圍電路、非易失性存儲、 led顯示、時鐘管理、鍵盤介面，以及sci通信和can通信等單元電路。
  7. The fourth chapter : in this chapter, it introduces the hardware designing of the dsp system based on pci bus and states every module of the hardware designing : circuit of signal adjusting, filter circuit of anti - overlap, circuit of data - acquisition automatically, expanding circuit of dsp memory, circuit of voltage matching, interfaces circuit of pci etc. it also includes theoretic basis and procedure of pcb designing

    第四章介紹基於pci總線的dsp系統硬體設計。敘述了硬體設計的各個模塊：信號調理電路、抗混疊濾波電路、自動數據採集電路、 dsp存儲器擴展電路、電平匹配電路、 pci介面電路等，以及pcb設計的理論基礎和設計過程，並給出了設計和調試的結果。
  8. It includes chip selection, schematic circuit design, cpu selection and configuration, startup of the system, selection and configuration of embedded operation system, selection and configuration of tcp / ip software. it also describes some driver programming techniques of network controller. part 3 ( chapter 5 and 6 ) briefly introduces encryption technology and the ipsec protocol system, including architecture, mode, security association, security policy, implementation mode, processing of in / out packet, esp ( encapsulation security payload ), ah ( authentication header ), ike ( internet key exchange ) etc. the security requirements of embedded - networking is also analyzed

    本文首先探討了嵌入式網路的原理和設計要求，接著介紹了本文所開發的嵌入式系統的硬體平臺的設計（包括處理器的選擇與配置、存儲器的選擇和io設備的選用等） ，系統的啟動（包括bios和dos的啟動以及嵌入式操作系統vrtx的配置和引導） ，網路及其安全服務的實現（包括嵌入式協議棧usnet的選取、底層驅動程序的設計和安全協議ipsec的分析與實施） 。
  9. In many caces, the data in data warehouse which derive from multi - operation data source. however, data source is likely stored on different hardware platform and use different os. as a result, the data from these data source absolutely exist inconsistent data

    但是，由於數據倉庫中的數據來自多種業務數據源，這些數據源可能是存儲在不同的硬體平臺上，使用不同的操作系統，因而從這些數據源中獲取來的數據中不可避免地存在一些不一致的數據。
  10. The main content is design of digital man - machine interface system, a speed regulating system of good stabilization and dynamic performance ; software for appraising the performance of wire feeder. the first, a digital man - machine interface system using at89s8252 singlechip is designed. the system uses sd7218a keyboard / display chip with serial bus interface

    首先，人機交互系統選用at89s8252為核心控制晶元，選用具有串列總線介面的sd7218a鍵盤/顯示晶元完成了數字化人機交互系統軟、硬體設計;採用rs - 485總線實現主控系統和人機交互系統的數據交互;系統採用數字編碼器和鍵盤配合的方式實現焊接參數的選擇和設定，同時還具有最優參數存儲、調用等功能。
  11. This software system of chip simulation ' s main function is simulate the main logic circue chips, 8088cpu, memory, registers, data _ bus, address _ bus, control _ bus and other chips. this function is based on the object - oriented technology, construct the chip object by the chip classes that we defined. because this system need to simulate the detail function of computer hardware, so this system simulate the 8088cpu ' s order system, support the basic compile languages. one of the feture of this system is the simulation of a static memory, the room of the memory can be configured by testers from 1k to 64k

    由於本系統在模擬過程中需要完全模擬計算機硬體的工作原理，因此本系統還模擬了8088cpu的基本指令系統，支持基本的匯編指令，在實驗過程中可以由實驗者輸入相應的匯編指令以執行操作，並查看各晶元器件的引腳參數變化情況。本系統模擬的一個特點是動態模擬了存儲器的大小，存儲器容量可以由實驗者根據需要自己設置，范圍從1k到64k 。
  12. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成；接著說明飛控計算機整體系統方案的設計；然後詳細說明飛控計算機硬體平臺的設計，包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分，體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面；最後是軟體部分的編程，包括cpld部分的硬體描述語言程序設計，和dsp部分相關的程序設計。
  13. Consequently, based on the analysis of quad el transceiver working principle and the comparison of various processors " features, the author proposes the hardware design of quad el transceiver, and then introduces the time module, interface circuit of the system, storage system module, four channel el composer module, cpu module and time - interval exchange module respectively

    然後，在分析了四路e1收發器的工作原理和比較了各類處理器特點的基礎上，提出了四路e1收發器的硬體設計，分別介紹了時鐘模塊、系統介面電路、存儲系統模塊、四通道e1合成器模塊、 cpu模塊以及時隙交換模塊。接著，在研究分析了g
  14. In system hardware design, data pipeline of the separation of reading and writing, which aims at data memory control - flow analysis in raid and reduces the resource ' s expanse of memory system, is established

    在系統硬體設計中，針對數據在raid中的存儲控制流程，建立了讀寫分離的數據流水線，減少存儲系統的資源開銷。
  15. We adopt a ping - pong buffer mechanism to guarantee the system ' s real - time implementation. in the hardware design, we use adsp2188n and codec chip msm7702 to accomplish the algorithm and flash memory sst391f080 to store the startup code. assembly language code and some necessary initialization data

    在硬體設計中，本系統以adspzi88n為核心，結合codec晶元msm7702完成編解碼演算法，使用flash晶元sst39lto80來存儲系統的啟動程序、匯編語言程序和初始化表格數據，使用話筒和聽筒來完成語音的輸入輸出。
  16. At first, it discusses the way to design a data acquisition and storage system with high speed based on pci ( peripheral component interconnect ) bus, then the author implements the device driver to acquisition the image data with high speed in real time in the kernel mode of system based on researching deeply of the mechanism and structure of kernel mode in windows operating system

    首先討論了pci （ peripheralcomponentinterconnect ? ?外圍部件互連）總線高速多通道數據採集與存儲系統硬體介面設計方法，然後深入討論了基於windows系統核心態結構機制基礎上的設備驅動程序的設計方法，最後討論了cd - 650bx的設計與實現。
  17. As we known, there is a big performance gap of data access among each layer in three layer storage system. so in order to integrate them into a seamless storage system and support database system well, we must design a query processing method which fit the hardware characteristic of three layer storage system

    由於三級存儲系統各存儲層次在數據存取性能方面存在巨大差異，為了使三級存儲系統各存儲層次「無縫」地連接在一起並很好地融入到數據庫系統中，就必須研究設計出符合三級存儲系統硬體特點的高效的查詢處理方法。
  18. And hardware / software coverification is carried out to guarantee the correctness of design. in the design of hardware of memory system, according to the system specification, we select the appropriate memory capacity, sram block, associativity and the placement of cache in the pipeline

    在存儲系統的硬體設計中，始終以性能指標作為依據，克服了存儲器容量、庫單元規格選擇、聯合度的選擇和cache在流水線中的位置選擇等困難，設計出了符合指標要求的指令存儲系統。
  19. At last, it develops the program of data acquisition and storage. these methods were discussed in this paper have been applied in the project of cd - 650bx and will be improved in the future

    在設計的過程中，對整個多通道數據採集與存儲系統進行了系統結構分析、採用cpld技術設計硬體內核、繪制原理圖、編制了設備驅動程序，為多通道數據採集與存儲系統的研究工作奠定了良好的基礎
  20. Hardware storage area of granddog supports file management system and 3 file formats, which include

    宏狗硬體存儲區支援文件管理系統，支援3種文件格式，其中包括：
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