硬體轉儲 的英文怎麼說
中文拼音 [yìngtǐzhuǎnchǔ]
硬體轉儲
英文
hardware dump-
In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical
在硬體設計中,本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信,同時系統電路配置成中斷響應方式,這樣既滿足了系統要求,又充分利用了tms320f2812的硬體資源。在軟體設計中,本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。Converting a program ' s address to hardware addresses and loading it in main storage
將程序的地址轉換為硬體地址,並將它加載到主存儲器中。Yet we don t always pay much attention to the various aspects of money that are of great importance to all of us : how the value of money is kept stable, for example ; how money is stored and put to work through the banks ; how money circulates around the economy ; how different forms of money - from coins and bank notes to the latest e - money - function
大家每日都會接觸和使用不同形式的貨幣,但對一些環繞貨幣而與我們息息相關的事情,像貨幣價值如何維持穩定貨幣如何經銀行儲存然後再轉作其他經濟用途貨幣如何在經濟體系內循環流通硬幣紙幣以至電子貨幣等各種形式的貨幣如何運作等,我們卻很少會留意。Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp
本文首先介紹飛行模擬訓練系統的主要組成;接著說明飛控計算機整體系統方案的設計;然後詳細說明飛控計算機硬體平臺的設計,包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分,體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面;最後是軟體部分的編程,包括cpld部分的硬體描述語言程序設計,和dsp部分相關的程序設計。In the hardware design, the analog circuit, high - speed a / d convertor, storage control logic and vxibus interface are discussed. the results of the simulation and analysis of the circuits are given
在模塊的硬體電路設計部分中,著重對信號調理電路、高速a / d轉換器、高速存儲邏輯控制以及vxi總線介面等內容進行了討論,給出了具體的電路設計和關鍵器件的說明,並對部分模擬電路和數字電路進行了模擬分析。In such situation, controlling of the transf - orming process and synchronizing of sampled data only could be achie - ved via hardware, and data must be stored ( by using high - speed stora - ge chip ) and digital signal must be processed ( by using high - speed d - sp ) in real time simultaneously
在這種情況下,通常只能用硬體實現轉換過程的控制和采樣數據的同步,仔細設計時序電路,同時必須採用高速存儲晶元對數據進行存儲和高速的數字信號處理器( dsp )完成數字信號的實時處理。The minimum control system of single - chip micro - controller has two part of binary systems serial communication. for the communication between pc and the single - chip instrument, i chose to connect a chip named max232 to proceed the level conversion in electricity, establish the correspondence agreement, drawing the hardware connection diagram, and designed the correspondence procedure process with parts of procedures code ; for the communication between the single - chip instrument and the fx489, thesis uses 8251a to expand 89c51 for a serial port
對于pc機和單片機的通信,論文選擇了介面晶元max232進行電平轉換,設定了雙方通信協議,畫出硬體連接圖,並設計了通信程序流程及部分程序代碼;對于單片機和fx489之間的串列通信,論文採用了8251a擴展了89c51的一對串列口,同時也設計了這部分的通信程序流程及程序代碼;另外,還對89c51擴展了一片數據存儲器6264 。The computer operating procedures manual provides information and operating instructions ( e. g. switching onoff of hardware equipment, taking system dumps, etc. ) related to the operating of the computer system
電腦操作程序手冊載列與操作電腦系統有關的資訊及操作指示(例如:開關硬體設備、轉儲系統內容等) 。The thesis finished a sample instrument used in measurement node. it is based on 8 - bit micro controller unit and has smart functions including auto calibration, auto scale change and auto balance of whetstone bridge. the data can be processed, stored, transferred and displayed in the sample device
本文完成了測試系統中基於16位微處理器的網關的硬體架構和軟體實時多任務內核的設計;研製了基於8位微處理器的具有自校正、自動量程轉換及測試電橋的自動調平功能的測試節點樣機;實現了測試節點的數據處理、存儲、顯示和傳送;繪制並編寫了測試節點的硬體電路圖和軟體源程序。Through using for reference and demonstrating the technology of video processing system of domestic and foreign, author has put forward a set of video processing system schemes suitable for the china " s actual conditions. by using the digital technology, such as digital encode - decode, digital phase - locked, digital filter, digital image storing, the system schemes realizes tv signal noise reduction and time error elimination in real time, and makes the system be a integrated noise reduction and time based corrector really
通過借鑒和論證國內外時基校正和視頻降噪的相關技術,作者提出了一套適合於中國國情的視頻處理系統軟、硬體方案實現模擬電視的信號數字轉換以及利用數字編解碼、數字鎖相、數字濾波、數字圖像存儲等數字技術來實現電視信號實時去噪和消除時基誤差,使系統真正做到集時基校正與降噪一體化。The control software connects with pci driver to send order to the measurement system, in order to initialize the system and start collection. it will access the time domain data in ram and frequence domaim data in dsp through pci bus, finish data transfer automaticly, display the data in many ways such as graphicness and table, and store the data into harddisk at the same time
總控軟體與pci驅動程序掛鉤,向測試系統發命令,實現系統的初始化和啟動採集等動作,並通過pci總線讀取ram中的時域數據和dsp中的頻域數據,自動完成數據轉換,以圖形和表格等多種方式實時顯示被測參數,並在顯示的同時將數據存儲到硬盤中去。The hardware system includes power supply circuit, clock reset circuit, jtag model building circuit, decoding circuit, memory interface circuit, man - machine interface circuit and numeric control constant - current source interface circuit
硬體系統主要包括電源電路、時鐘復位電路、 jtag模擬介面電路,譯碼電路、存儲器介面電路、人機介面電路、 adc轉換電路和數控恆流源介面等。The second chapter studies the hardware structure and software system of the " embedded real - time distributed, system ". the third chapter and the forth chapter deeply analyze the process management and memory management in linux system. they analyze the process creating, executing, dying and process schedule algorithm, beginning with the conversion of the process state
第二章研究了「嵌入式實時分佈系統」的硬體結構和軟體體系,第三章和第四章深入的分析了linux系統中進程的管理以及存儲管理,從進程狀態的轉換出發,深入的分析了進程的創建、執行和消亡;同時分析了進程的調度演算法。Design and make the blood pressure and artery stiffness appartus, including the design of filter, amplifier, adc, memorizer circuit, lcd circuit, communication interface circuit, power supply, etc. research the blood pressure arithmetics and bring forward a new blood pressure judging method based on existing oscillometric technique
該儀器硬體電路以at89c55單片機為核心,包括信號採集處理電路、 a / d轉換電路、存儲器擴展電路、液晶顯示電路、自動充放氣電路、串列通信電路、鍵盤電路等幾大部分。The task of realtime display on lcd and the complicated control arithmetic are implemented in this smps system, and a microcontroller with high resolution, high speed, high integration, large memory is necessary. in this paper, the design theory of s / h ware module which forms the smps control module and the design scheme is discussed in detail. in this system, the digital compute - control module is implemented with samsung ’ s high resolution, high integration, arm core microcontroller s3c44b0 and ad converter with 16bit resolution produced by ad company, ad7705. the ad7705 implements the data acquisition of the voltage and current feedback signal, and transfer the data to microcontroller through spi bus, which is implemented with s3c44b0 ’ s gpio, for computation and display
本開關電源系統不僅完成lcd的實時顯示,還要完成復雜控制演算法,需要高速度、高精度、高集成度、大存儲空間的微控制器的支持。本文詳細的論述了構成電源控制模塊的各個軟硬體模塊的設計原理和設計方案。本系統提出了以samsung公司的高速度、高集成度的基於arm架構的微控制器s3c44b0與ad公司具有16位解析度的模數轉換器ad7705晶元構成數字採集運算控制模塊。Special hardware compatibility testing is necessary when implementing a failover server cluster on a storage area network
在存儲區域網路( san )上實施故障轉移服務器群集時,需要測試特殊硬體的兼容性。Hardware platform includes data communiacation, voice processing and the system of fpga. rs232 and epp mode are used in tte part of the data communiacation. voice signal collection and magnify, ad / da conversion and power magnify circuits are integrated in the part of the voice processing
其中軟體平臺包括多媒體文件的讀寫、存儲與界面的設計;硬體平臺包括數據通信、語音處理、 fpga系統三個部分,數據通信部分使用rs232和epp通信模式,語音處理部分集成了語音信號採集放大、數模轉換與功率放大電路等。This work is part of the design of 500m sampling digital storage oscillograph and the assignment is to develop the gpib ( general purpose interface bus ) instrument driver. the controller is able to operate the dso in distance using the instrument driver. the task consists of the programming of the gpib - rs232 convertor ( the hardware is well developed ), which enables communication between the dso and the controller, the development of the instrument driver and the design of dso control panel
本課題是科研項目? ? 「帶寬500mhz的數字存儲示波器dso ( digitalstorageoscillograph )研製」的一部分,任務是完成gpib ( generalpurposeinterfacebus )儀器驅動器的相關研發,包括在gpib - rs232程式控制轉換器硬體基礎上完成監控程序設計,實現測控機和dso的底層通信;以及在此基礎上設計示波器的儀器驅動器和示波器虛擬面板。In order to design a simple digital storage oscillograph under low price and high performance, on the basis of introducing the principle of simple digital storage ocsillograph, the project of simple digital storage ocsillograph is stuied, the d / a and signal display module of simple digital storage oscillograph is designed by the mcu and integrate circuit technology, the hardware block diagram provided in detail
摘要為了設計出一種價廉物美的簡易數字存儲示波器,在介紹簡易數字存儲示波器工作原理的基礎上,對簡易數字存儲示波器的設計方案進行了研究,並採用單片機和集成電路技術,對該簡易數字存儲示波器的信號顯示模塊進行了設計,具體給出了數模轉換器和信號顯示模塊的硬體電路圖。In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter
在電路模塊分析中,重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等,並且給出了在硬體電路設計和調試過程中的問題與解決辦法。分享友人