編譯時描述 的英文怎麼說
中文拼音 [biānyìshímiáoshù]
編譯時描述
英文
compile-time description- 編 : Ⅰ動詞1 (編織) weave; plait; braid 2 (組織; 排列) make a list; arrange in a list; organize; gr...
- 譯 : 動詞(翻譯) translate; interpret
- 時 : shí]Ⅰ名1 (比較長的一段時間)time; times; days:當時at that time; in those days; 古時 ancient tim...
- 描 : 動詞1. (照底樣畫) copy; depict; trace 2. (在原來顏色淡或需改正之處重復塗抹) retouch; touch up
- 述 : Ⅰ動詞(陳說; 敘述) state; relate; narrate Ⅱ名詞(姓氏) a surname
- 編譯 : [計算機] compile; translate and edit編譯程序 compiler; compile programme; compiling routine; 編譯...
- 描述 : describe; represent
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This approach provides a function to modify ui for the final user with a customizing modular inserted between the application system and interface display layer, by which the data of ui design is separated from application logical modular. when the system is started every time, it could display the interface according to the information from the customizing modular without being compiled and linked again
本論文提出一個基於可擴展標識語言( extensiblemarkuplanguage , xml )的可定製用戶界面管理機制,利用xml描述用戶界面並進行持久存儲,在應用系統和界面顯示層之間加入界面定製模塊,使系統每次啟動時都按定製模塊提供的信息來顯示界面無需重新編譯和連接,很好地實現用戶界面與應用語義的分離,為最終用戶提供了靈活的界面維護修改功能。Then describes the 4 function modules in vhdl, the vhdl programs have passed compile and debug in maxplus ii, the results of function simulation and timing simulation all prove that the design is correct, at last, maxplus ii generates a netlist file which can be download into chip
然後使用vhdl硬體描述語言對四大功能模塊進行描述,在maxplus環境下編譯、調試通過,功能模擬和時序模擬結果證明設計正確,最後生成可下載的網表文件。Flags for an assembly, describing just - in - time compiler options, whether the assembly is retargetable, and whether it has a full or tokenized public key
標志的按位組合,從而描述實時( jit )編譯器選項,該程序集是否可重定目標以及是否有完整或已標記化的公鑰。The most important such information is a small set of character stringsdescribing attributes of the object being requested, including its uri, filename, content - type and content - encoding ( these being filled in bythe translation and type - check handlers which handle the request, respectively )
這些信息中最重要的是一個小的字元串的集合,他們描述了被請求對象的屬性,包括它的uri ,文件名,內容類型和內容編碼(它們在處理請求時,被分別填入翻譯和類型檢查句柄) 。This system is realized by cpld which can get rid of the disadvantages in one - time design including property liable to jamming, long sampling period, and poor working stability. its sampling period is up to 500ns at least and output delay is only 19. 5ns. a stable period of pulse coming out of quadruple - frequency differential circle belongs to it
完成了用vhdl硬體描述語言對全數字轉速位置測量子系統的設計,並用max ? plusii軟體進行了編譯和波形模擬,在cpld ( max7000 )得到實現,該系統克服以往設計中存在的易受干擾、工作穩定性差、采樣周期太長等的缺點,輸出延時僅為19 . 5ns ,采樣最低周期可達到500ns ,且四倍頻微分電路獲得的脈沖周期穩定。Attributes describe how to serialize data, specify characteristics that are used to enforce security, and limit optimizations by the just - in - time compiler so the code remains easy to debug
屬性( attribute )描述如何將數據序列化,指定用於強制安全性的特性,並限制實時( jit )編譯器的優化,從而使代碼易於調試。( 3 ) discusses the formal specifications for hardware formal design and presents the formal model of fcmhd ( formal computational model for hardware design ) and its formal semantics based on itl ( interval temporal logic )
作者以時段演算( durationcalculus , dc )為工具對vhdl的子集進行了形式語義分析;通過分析vhdl和veriloghdl部分語句的形式語義,為硬體描述語言的分析、設計、編譯提供了一個嚴格的理論基礎和新的途徑。分享友人