編輯邏輯部件 的英文怎麼說

中文拼音 [biānluóbùjiàn]
編輯邏輯部件 英文
programmer logical unit
  • 編 : Ⅰ動詞1 （編織） weave; plait; braid 2 （組織; 排列） make a list; arrange in a list; organize; gr...
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 部 : Ⅰ名詞1 （部分; 部位） part; section; division; region 2 （部門; 機關或組織單位的名稱） unit; mini...
  • 件 : Ⅰ量詞（用於個體事物） piece; article; item Ⅱ名詞1. （指可以一一計算的事物） 2. （文件） letter; correspondence; paper; document
  • 編輯 : 1. （加工整理） edit; compile 2. （做編輯工作的人） editor; compiler
  • 邏輯 : logic
  • 部件 : component; unit; parts; assembly; subsystem; secundina （pl. secundinae）
  1. Ternary optical coder, decoder and ternary logical calculus belong to key components of ternary optical computer, and they are the base of implementing other components of the optical computer

    三值光編碼、解碼器和三值邏輯運算器是三值光計算機關鍵部件，是實現三值光計算機其它部件的基礎。
  2. The dcs of i / a series is regarded as main reference object, and the control is separated from model. and the configuration of control is operatised at administration system, not to be added into model, not to build control sound code also. therefore it realizes on - line adjusting, real - time control and so on. users configurate by filling table. they only define i / o condition, fill certain operation variable, and name logic variable. the software offers a friendly user ' s interface, so personnel can compile and modify the control and logic program, change the value of logic and control variable conveniently, attach themselves to run, debug and control the system, not need to know the programs deeply. so the configuration software offer a flat that control engineers can attend to control loop, not to give their attention to the complicated program

    在本課題中，採用填表的方式進行控制組態，用戶只需定義i / o條件、填寫具體的運算變量名即可。本軟體為建模人員提供了一個友好的用戶界面，使建模人員在建模時不必對模塊內部的控制、邏輯程序有很深的了解就可以方便的對其進行編寫和修改，實時改變各邏輯和控制變量在數據庫里的值，參與運行和調試，從而實現對系統的控制。因此，本組態軟體提供的這樣一個平臺，讓控制工程師能集中精力于控制迴路的構成，而不必拘泥於一些具體而煩瑣的程序操作。
  3. Therefore it comes true the on - line adjusting, real - time control and so on. it sames as real locale. the software of logic protect ( include electric logic ) and control includes some usual algebraic and operation model of thermal control and logic operation of logic protect. it adopts foxboro ' s dcs as a example, so we configuration via filling table, user only define i / o condition, fill certain operation variable, and name logic variable. the software offers a friendly user ' s interface, personnel can compile and modify the control and logic program, change the value of logic and control variable conveniently, attach themselves to run, debug and control the set, not need to know about the inside of the old programs deeply. so the configuration software offer a flat that control engineer can attend to the structure of control loop and logic protect ( include electric logic ), not but to handle complicated program

    它以foxboro的dcs控制系統為主要參考模式，採用填表的方式進行控制組態，用戶只需定義i / o條件、填寫具體的運算變量名、邏輯變量名即可。本軟體為建模人員提供了一個友好的用戶界面，使建模人員在建模時不必對模塊內部的控制、邏輯程序有很深的了解就可以方便的對其進行編寫和修改，實時改變各邏輯和控制變量在數據庫里的值，參與運行和調試，從而實現對機組的控制。因此，本組態軟體提供的這樣一個平臺，讓控制工程師能集中精力于控制迴路及邏輯保護（包含電氣邏輯）的構成，而不必拘泥於一些具體而煩瑣的程序操作。
  4. This design is the first solid - state memory system for satellite, which can confront with multi - clock sources and multi - data sources compatibly. it is the fist design that integrates all functions of data processing and control into a single programed logic device. this design can be an ip core that can bring large advantage when system upgrade in the future

    本星載固存系統是我國星載固存系統中第一個採用多數據源，多時鐘源進行兼容設計的單一固存系統；第一個採用ip化、參數化設計思想，採用單一邏輯編程器件做為固存系統唯一控制部件，為以後系統升級帶來了很大好處；第一個採用功耗均衡思想來降低系統功耗。
  5. The basic working principles and characteristics of srm will be described firstly in this paper, as well as its developing survey and researching directions. and then the srd system will be separated into several function parts to be introduced respectively in details : ( 1 ) to analyze the basic characteristics of the srm including electromagnetism, current and torque of every angle field of the rotor based on the subsection - linearized inductance characteristics of stator windings and several idealized supposes. ( 2 ) how to design and realize the h - bridge converter, and the method to use it ; ( 3 ) how to design and realize the controller based on dsp ( tms320f240 ) and the control strategies, as well as the program ; ( 4 ) to introduce the monitor program running in a pc, which is programmed by delphi

    本文首先介紹了srm的基本工作原理和特點以及srd系統發展概況和研究方向，然後以srd的功能構成為線索分部分進行介紹： （ 1 ） srm的特性及控制策略分析，在電感分段線性化等簡化條件下分析得出了各個轉子位置角度區間的電磁、電流和轉矩特性並分析了控制策略； （ 2 ）分析設計了h橋式功率變換器的設計和工程實現的方法，並設計了基於這種功率變換器的換相邏輯； （ 3 ）分析設計了以dsp為核心的控制器以及控制方法，並介紹了該控制器的軟硬體實現； （ 4 ）介紹了如何用delphi編制實現上位機監控程序。
  6. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成；接著說明飛控計算機整體系統方案的設計；然後詳細說明飛控計算機硬體平臺的設計，包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分，體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面；最後是軟體部分的編程，包括cpld部分的硬體描述語言程序設計，和dsp部分相關的程序設計。
  7. 1. a small and cheap 8 - bit microcontroller is used as control core. all components of the sensor, some of which are necessary for the multiple and intelligent functions, are selected ones with low cost and small package. by designing all auxiliary logic circuits in a complex programmable logic device ( cpld ), and integrating all analog circuits in an application specific ic ( asic ), the size of pcb board is greatly reduced, which make it possible that the pcb can be installed with the displacement detector together

    系統採用小型廉價8位微控制器控制，電路內配置了為實現多功能智能化所必需的硬體，並全部採用低價格、小體積器件，還將所有輔助邏輯電路設計在一片復雜可編程邏輯器件cpld內，所有模擬電路集成於一片專用集成電路asic內，大大縮小了電路板尺寸，再與傳感元件組裝在一起，從而使整個系統在保證智能化功能的前提下，具有體積小、成本低、一體化和抗干擾能力強的特點。
  8. In the constructing of the diagnosis module using the technology of the combination of the fuzzy logic and neural network, which based on the fuzzy adaptive learning control network, a simple kind of capable method for consummate the structure and performance of network is introduced, which includes the rules extraction based on the maximum weights matrix and the parameters amendment based on genetic algorithm by floating - point coding. during the monitoring of the parts condition, the output of the condition monitoring system shows the good working condition of the executing agency by fuzzily deducing from the control instruction send by the auv ' s controller and motion status, and so offers the proof to complete mission and return safely

    在珍斷模塊建模中採用模糊邏輯與神經網路結合的技術，以模糊自適應學習控制網路為核心，提出了一種簡單可行的基於最大權值矩陣的規則提取及基於浮點數編碼的遺傳演算法的參數調整的，完善網路結構與性能的方法，並在狀態監測過程中，通過對由控制器輸入的水下機器人運動控制量以及運行狀態的模糊推理，得到執行部件（推進器或舵）的工作狀態優劣程度，為保證水下機器人完成任務，安全返回提供控制依據。
  9. The paper is completed research of measurement and control system based on dsp under technology. the paper is designed a card with the data - collection conversion and control by adopting mainly tms320f240 among the dsps as kernel processor, with peripheric a / d and d / a circuit epm7128 ' s decode and latch circuit and isa interface circuit

    本論文主要是採用數字信號處理器dsp中的tms320f240作為核心處理器，結合外部的模數轉換和數模轉換電路、可編程邏輯器件epm7128的地址譯碼和鎖存電路和isa介面電路，設計了集採集、轉換、控制於一身的isa卡。
  10. The paper analyses the features of mmc2107 in detail, designs circuit diagram of the software debug platform, presents an accurate description of the logic symbol in complex programmable logic device, gives a detailed discussion about the operating mechanism of target resident kernel and the customization of the system software

    文中詳細地分析了mmc2107的功能特性，設計了軟體調試平臺硬體電路，給出了復雜可編程邏輯器件的內部邏輯圖，論述了駐留程序的工作機制並定置了系統程序。
  11. The control system includes two modules, one named the input module which acquires data digitally, and the other, named the output module, controls the emission of the laser, the gating function of the single photon counting module ( spcm ) and the synchronization of the input and output modules. each of them uses a complex programmable logic device ( cpld ) as the core component, and is devided into three parts : the hardware circuit, the programming logic circuit and the software

    該控制系統主要包括控制單光子發射、單光子探測器、數據採集接收系統的輸出系統和數據採集系統兩個模塊，它們都採用復雜可編程邏輯器件cpld作為核心功能晶元，由硬體電路設計、晶元編程和高級軟體編程三部分組成。
  12. Fpga ( field programmable gate array ) is a kind of programmable logic device

    Fpga屬於一種可編程邏輯器件，晶元內部以陣列狀排列各種可配置邏輯塊。
  13. Last, the cpld / fpga can load difference hdl. so the control logic can be change easily. i use fuzzy control to make the control character better

    最後，利用可編程邏輯器件的靈活性，載入不同的硬體描述程序改變內部邏輯電路，實現不同的控制邏輯。
  14. 2. by analyzing the partial discharge signals and the interferences and using high - speed filed programmable gate array ( fpga ) and digital signal processor ( dsp ), a hardware and print circuit board have been designed 3

    2 ）通過對局部放電和干擾的分析，針對局部放電信號實時處理的要求，利用高速的現場可編程邏輯器件和數字信號處理器完成了信號處理的硬體電路板的設計與製作。
  15. The emphasis of this article is the design in the second period, which is based on the pic microchip interface, because at present embedded structure is adopted by most of medical instruments so that it can run separately without computer, hi this part the article specifically introduces the interface circuit of pic16f877 single - chip, which includes the acquisition of a / d signa ls and the serial communication between the single - chip and computer, the design of complex programmable logic device ( cpld ) and the using of hardware describe language ( vhdl ) to control the rotate speed of 4 - route stepping motors

    本論文的重點是在設備的第二階段開發，它是基於pic系列單片機介面的硬體設計，主要是針對現階段大多數醫療設備都是採用嵌入式結構，它能夠脫離計算機單獨運行。在這部分詳細介紹了pic16f877單片機的外圍電路，包括a d信號的採集、單片機與計算機的串列通信，可編程邏輯器件cpld硬體的設計，以及用硬體描述語言vhdl編程來同時實現4路步進電機的轉速控制。
  16. In this paper, the principle and method that making use of complex programmable logic devices ( cpld ) to realize high accurate pwm controller are chiefly analyzed, and a new control method and amendatory strategy for the triple multi - level convector based on cpld is put forward. by carefully analyzing the triple multi - level power amplifier composed of four bridges converter bridge, the fact and idea that complex programmable logic devices ( cpld ) have high speed

    本文詳細討論分析了用可編程邏輯器件cpld實現高精度pwm控制器的原理和方法，並且提出了一種基於cpld器件的三進制多電平逆變器的控制方法和改進策略，針對具有四級逆變橋結構的三進制多電平功率放大器進行了具體的分析和驗證，證實了可編程邏輯器件內部高速處理的性能和在電力電子技術控制中的應用優勢。
  17. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統，由數字控制模塊、驅動模塊和電源模塊組成，系統以at89c52單片機為核心，通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生，系統將可編程邏輯器件（ pld ）器件和在系統編程（ isp ）新技術引入到細分驅動環行分配器的設計，通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構，大大簡化了電路，並提高了電路抗干擾能力。使系統實現參數存儲，速度數字控制，數碼顯示，進退刀控制等功能。
  18. Then, the author specially studies the characteristic of system architecture of the dsp, paints schematic principle diagram and pcb diagram of the hardware circuit system, writes the program decoding and partial data processing of the cpld, adopting verilog hdl hardware describing language

    然後，研究了dsp晶元結構體系的特點，繪制了硬體電路系統的原理圖和pcb圖，且採用veriloghdl硬體描述語言編寫了復雜可編程邏輯器件（ cpld ）的譯碼與部分數據處理程序。
  19. In addition to these, the most important chips are cpld which can be upgrated and expanded easily, which makes it possible that the capability can be optimized and the operation can be expanded without changing the hardware. the type of the bus controlling based on the cpld ensures the operatings are processed in the same pri, and then it can let another chips deal with the processing when some chip can not afford

    保證的對信號和業務處理能力，而且關鍵晶元均採用可編程邏輯器件，有較強的升級和擴張能力，可以保證硬體不改變的情況下進行性能優化和業務擴展。基於cpld的總線控制方式也可以實現業務功能的均勻分擔，可部分實現某些晶元處理性能不夠的情況下講部分處理業務分擔至其他晶元。
  20. In this solution, the embedded soft cpu ip core is used as the kernel digital module with its periphery controllers based on residual les. in addition, analog channel circuit is added to form an integrated dso system. this dissertation focuses on framework construction, gui design, memory management, message fifo management, other hardware drivers and describes design and implementation of software simulation system written in advanced languages

    在這種方案中，使用了在fpga中嵌入cpu軟核作為控制核心，並用fpga晶元中剩餘的其他可編程邏輯資源構成該嵌入式系統的外圍器件，形成數字示波表的數字核心模塊，並配以模擬通道部分電路，組成了一個完整的數字示波表。
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