緩沖型計算器 的英文怎麼說

中文拼音 [huǎnchōngxíngjìsuànqì]
緩沖型計算器 英文
buffer computer
  • 緩 : Ⅰ形容詞1 （遲; 慢） slow; unhurried 2 （緩和; 不緊張） not tense; relaxed Ⅱ動詞1 （延緩; 推遲） d...
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 算 : Ⅰ動詞1 （計算數目） calculate; reckon; compute; figure 2 （計算進去） include; count 3 （謀劃;計...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 計算 : 1 （求得未知數） count; compute; calculate; reckon; enumerate 2 （考慮; 籌劃） consideration; pla...
  1. The predigested calculating model about lunar soft - landing damping system is established in the course of landing shock. the dynamic computer simulation model is established according to the structure parameters

    建立了磁流變阻尼器緩沖系統沖擊時的簡化模型，利用本文建立的動力學方程和所用阻尼器結構參數構建了動態模擬模型，並進行了計算機模擬。
  2. A general stack equation of mobile robot based on analyzing the motion of planar motion object and the mathematical models of four different kinds of common wheels is developed, accordingly, the mobility of mobile robot is addressed and the forward and inverse solutions to speed for specific configuration driven by differential speed are derived. utilizing the muir and newman convention, the description of the posture transformation matrices between different coordinate frames and the solution for the speed of point located on these frames are introduced. according to posture estimation, a more accurate method, dead reckoning algorithm, is developed for a specified configuration characterized by differential speed motorization, and simulations of this algorithm and other traditional methods are carried out using matlab while traversing a circular path

    本文對兩輪差速驅動移動機器人的運動學及其本體緩沖設計進行了探討，在對平面運動物體運動分析的基礎上結合四種常用車輪的數學模型，推導出了一個通用的移動機器人堆積方程，在此基礎上分析了移動機器人的移動能力、並針對兩輪差速構型推導了速度正解與逆解；使用muir和newman的運動學建模方法，推導了移動機器人上點及連桿坐標系位姿、速度變換關系矩陣及求解方法；在移動機器人位姿識別方法中結合差速驅動構型對航位推演算法進行了分析：推導了一種理論精度較高的航位推算演算法，並使用matlab對其與傳統的推算演算法在跟蹤圓弧軌跡情況下進行了模擬；最後針對本文所研究的機器人給出了一種比較系統、可靠的緩沖結構設計思路，較好地解決了移動機器人作業過程中外界因素及本身設計中引入的各種不確定誤差問題；本論文研究成果已在本實驗室所開發的樣機上得到實現，經過應用與考核證明其中的分析與設計是切實可行的。
  3. Become a kind of new electronics circuit - current - mode circuit. it is replacing the traditional design method of the voltage - mode in the high frequency high - speed signal processing realm 。 this thesis mainly discussed the modified second - generation current conveyors based on the current - mode kinds of new cuicuit components, they are stronger modified standard current - mode parts in fuctions on this foundation. mainly including the modified differential difference current conveyor ( mddccii ) 、 the fully balanced second generation current conveyor ( fbccii ) 、 ( full balances ) four - terminal floating nullor ( fbftfn ) and the current differencing buffered amplifier ( cdba ), they are all function very strong standard current - mode parts, they all can provide some circuit functions of better than general operation amplifier, because they have the voltage importation and the current importation, therefore use it since can carry out the voltage - mode signal processing circuit expediently, can also carry out the current - mode signal processing circuit expediently, and have to increase the benefit bandwidth to accumulate more widely than the voltage - mode, but have their advantages more according to the current - mode filter of the modified current conveyor, because it constitutes in brief, the filter wave function is stronger and they are better than in general use operation amplifier of many advantages, be easy to composing for example 、 high speed 、 frequency bandwidth 、 the power supply voltage requests low 、 consume small, the impedance is different from etc. advantages, otherwise they have biggish dynamic range, and flexible circuit synthesize, so they are the best active parts

    從第二代電流傳輸器ccii入手，重點研究了以下幾種改進型的第二代電流傳輸器:改進的差動差分電流傳輸器mddccii 、全平衡第二代電流傳輸器fbccii 、多輸出四端浮地零器ftfn 、全平衡四端浮地零器fbftfn 、電流差分緩沖放大器cdba的電路結構及其模型。然後在此基礎上系統地研究了基於這幾種改進型的第二代電流傳輸器的濾波器的設計方法，主要方法和結果如下:利用mddccii設計了差分式連續時間電流模式低通、帶通濾波器;電流模式跳耦結構考爾低通濾波器;利用fbccii設計了帶通二階節濾波器及電流模式雙二階通用濾波器;設計了基於多輸出端ftfn的電流模式二階通用濾波器電路;通過數字化開關選擇的基於fbftfn的電流模式通用濾波器;設計了基於最少個數電流緩沖放大器（兩個cdba ）的多功能通用電流模式濾波器及其在非理想因素情況下分析。設計濾波器的主要方法是採用級聯設計、運算模擬（信號流圖法）和反饋設計（跳耦法） 。
  4. An algorithm of path - based timing optimization by buffer insertion is presented. the algorithm adopts a high order model to estimate interconnect delay and a nonlinear delay model based on look - up table for gate delay estimation. and heuristic method of buffer insertion is presented to reduce delay. the algorithm is tested by industral circuit case. experimental results show that the algorithm can optimize the timing of circuit efficiently and the timing constraint is satisfied

    提出了一種基於路徑的緩沖器插入時延優化演算法，演算法採用高階模型估計連線時延，用基於查表的非線性時延模型估計門延遲.在基於路徑的時延分析基礎上，提出了緩沖器插入的時延優化啟發式演算法.工業測試實例實驗表明，該演算法能夠有效地優化電路時延，滿足時延約束
  5. With regard to the flow regulation of the best - effort traffic, the controllable traffic in high speed computer communication networks, the present paper proposes a novel control theoretic approach that designs a proportional - integrative ( pi ) controller based on multi - rate sampling for congestion controlling. based on the traffic model of a single node and on system stability criterion, it is shown that this pi controller can regulate the source rate on the basis of the knowledge of buffer occupancy of the destination node in such a manner that the congestion - controlled network is asymptotically stable without oscillation in terms of the buffer occupancy of the destionation node ; and the steady value of queue length is consistent with the specified threshold value

    本文從控制理論的角度出發，針對計算機高速網際網路中最大服務交通流即能控交通流的調節問題提出了一種基於多速率采樣的具有比例積分（ pi ）控制器結構的擁塞控制理論和方法，在單個節點的交通流的模型基礎上，運用控制理論中的系統穩定性分析方法，討論如何利用信終端節點緩沖佔有量的比例加積分的反饋形式來調節信源節點的能控交通流的輸入速率，從而使被控網路節點的緩沖佔有量趨于穩定;同時使被控網路節點的穩定隊列長度逼近指定的門限值。
  6. Employing idef to establish framework, dynamitic and functional models, the system also designs a non - back shifting search arithmetic for double - scanning buffer zone and a double - track structure for searching process. according to the characteristics of e - mail control and electronic documentary mining technology, bayes classifiers are made to strengthen the electronic control system in which electronic documentary mining technology is used ; and moreover the double systematic structure of c / s & b / s is constructor with the presence of some function relationships in mining process as well as systematic mining and program handling

    系統採用i _ 2def方法建立了結構模型、動態模型和功能模型；設計了雙掃描緩沖區的無回溯搜索演算法及搜索過程的雙棧結構；根據電子郵件監控系統和電子文檔挖掘技術的特徵，設計了bayes分類器並使用了增強型方法，提出了一種運用電子文檔挖掘技術的電子郵件監控系統；構建了c / s和b / s雙重體系結構；並給出了挖掘過程的部分函數調用關系及系統挖掘的處理過程、部分處理程序。
  7. It has been shown by our calculations that conductor loss is greatly reduced under velocity matching with relatively thick coplanar waveguide electrodes and thick buffer layer, but the characteristic impedance can not match with that of the external circuit at the same time, and the modulation bandwidth is confined in this case

    然後，用一般的橢圓積分計算了普通共面波導型調制器的有效折射率、特徵阻抗和導體損耗系數。通過計算發現，採用厚電極和厚緩沖層結構，在實現速度匹配的情況下，可以大大減小導體損耗，但是由於阻抗不能同時滿足匹配，調制帶寬受到限制。
  8. Abstract : an algorithm of minimizing the number of buffers under certain delay constraint with accurate delay models is presented. given a two - terminal net, the algorithm can minimize the total number of buffers inserted to meet the delay constraint. a high order delay model is applied to estimate interconnect delay and a nonlinear delay model based on look - up table is for buffer delay estimation. the experimental results show that the algorithm can efficiently achieve the trade - offs between number of buffers and delay, and avoid needless power and area cost. the running time is satisfactory

    文摘:提出了在精確時延模型下，滿足時延約束的緩沖器數目最小化的演算法.給出一個兩端線網，該演算法可以求出滿足時延約束的最小緩沖器數目.運用高階時延模型計算互連線的時延，運用基於查找表的非線性時延模型計算緩沖器的時延.實驗結果證明此演算法有效地優化了緩沖器插入數目和線網的時延，在二者之間取得了較好的折中.演算法的運行時間也是令人滿意的
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