自測試 的英文怎麼說

中文拼音 [zìcèshì]
自測試 英文
self testing
  • 自 : Ⅰ代詞（自己） self; oneself; one s own Ⅱ副詞（自然;當然） certainly; of course; naturally; willin...
  • 測 : 動詞1. （測量） survey; fathom; measure 2. （測度; 推測） conjecture; infer
  • 試 : 名詞（古代占卜用的器具） astrolabe
  • 測試 : test; testing; checkout; measurement
  1. The pseudorandom test pattern generation for bist

    基於內建自測試的偽隨機測試向量生成方法
  2. In this paper we investigate and carry out boundary scan ^ internal scan and built - in self - test three dft technologies in the embedded microprocessor estarl and get satisfying result, the fault coverage is more than 96 %

    本文針對嵌入式微處理器estar1的結構特點，研究並實現了邊界掃描、內部全掃描和內建自測試三種可測性設計技術，取得了良好的效果，故障覆蓋率達到96以上。
  3. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  4. Using “ logical effort ” method to analyze the circuit ’ s critical path, and choose the optimized size of transistors in theory by this method. then, using sta technique simulates and analyzes the circuit to optimize transistors size further, and the circuit optimization arithmetic based on sta is gained. results proved that the optimization strategy of combining theory and practice have better effect

    結果證明，這種理論與實際結合的優化策略具有較好的效果;三、典型條件下，所實現版圖關鍵路徑延時1 . 38ns ，平均功耗45 . 3mw ，版圖面積0 . 05112mm2 ，達到了較小的延時、功耗和面積;四、針對所設計的算術邏輯部件，研究了一種獨特的內建自測試方法，只需較少的測試向量就可實現該部件100 %的故障覆蓋率，具有很高的效率和較低的代價。
  5. Not only the scan route solution, the built - in self - test solution and the boundary scan solution of design for testability are summarized, but also the applications and countermeasures of these 3 solutions are analysed and compared in details

    摘要綜述了超大規模集成電路的幾種主要的可測試性設計技術，如掃描路徑法、內建自測試法和邊界掃描法等，並分析比較了這幾種設計技術各自的特點及其應用方法和策略。
  6. In general, the tests work most effectively when the qualities to be measured can be most precisely defined and least effectively when what is to be measured or predicted can not be well defined

    參考譯文：把標準化測試作為批判目標是錯誤的，因為在抨擊這類測試時，批評者沒有注意到其弊病來自（測試）使用者對不甚了解或者使用不當（沒有能力使用） 。
  7. Bist is an efficient solution for the testing of soc. it is built up with prompting and responding circuits and these two parts are added to the circuit being tested so that the engineer need not consider the testing vector, for it ' s generated automatically

    而內嵌自測試技術對于解決soc生產測試的問題非常有效，它將一個激勵電路和響應電路中加到被測電路中，從而使測試人員不必再考慮測試向量的問題，因為它是自動生成的。
  8. Built - in power on self test

    內裝的自測試電源
  9. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ，其它ram則利用微碼rom中的微程序進行測試，而微程序的運行則可以順帶覆蓋其它數據通路，從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計，除必備的幾條邊界掃描指令外，還提供了debug 、 runbist等指令以支持內部故障測試、在線調試及內建自測試;內部掃描採用部分掃描策略，選擇邏輯部件的邊界及用戶關心的系統寄存器進行掃描，從而實現了硬體邏輯劃分，方便了后續的測試碼產生和故障模擬，並為在線調試打下了基礎。
  10. A circuit is designed to define the odd and even line to meet the layout ' s simplification requirement. to make full use of the system resource, an auto - test circuit is designed with test vector can be given through the internal bus and result vector can be detect by system

    為了充分利用了嵌入式晶元豐富的系統資源，設計了簡單實用的自測試電路，其測試向量和結果向量都可以通過總線被系統直接讀取，系統執行相應的指令就可以完成相應的自測試過程。
  11. Post power on self test

    加電自測試
  12. Does a bit more than merely making sure no exception is raised as with the initial test script

    的文檔字元串中定義的自測試所做的不僅是確保不發生異常（對照于最初的測試腳本） 。
  13. 5 sun x, xu j, trouborst p. testing xilinx xc4000 configurable logic blocks with carry logic modules. in proc

    在我們的方法中，雖然tpg為cut生成了測試向量，但是配置成tpg的le可以進行自測試。
  14. Ieee design test of computers, 1998, 15 : 12 - 16. 5 nicolaidis m. on - line testing for vlsi : state of the art and trends

    傳統的雙模比較冗餘dmr結構是一種從系統級到vlsi電路級得到廣泛使用的自測試結構。
  15. In this paper we use the bist in the testing of the ssrams in estarl according to the characteristics of the structure and get almost 100 % fault coverage

    本文針對estar1內部ssram的結構特點，實現了存儲器自測試，得到了將近100的故障覆蓋率。
  16. It discusses the architecture of testbench in functional verification of dtv chip and detailed accounts realization of memory bist ( build in self test ) method

    本章介紹了各種主流驗證測試方法，著重敘述了dtv晶元中功能驗證的平臺結構設計和存儲器內建式自測試（ bist ）的具體實現。
  17. The data can be intelligently analyzed and processed, the number can be shown and transmitted through the apparatusit can be used to self - examineself - diagnoseself - testself - repairself - adaptself - adjustself - study it is new - pattern apparatus using digital technology to take place of the imitated meter

    對數據進行智能分析和處理，數字顯示或傳遞，做到自檢自診斷自測試自修復自適應自校準自學習，是用數字技術取代模擬儀表的新型儀器。
  18. The data can be intelligently analyzed and processed, the number can be shown and transmitted through the apparatus it can be used to self - examine self - diagnose self - test self - repair self - adapt self - adjust self - study it is new - pattern apparatus using digital technology to take place of the imitated meter

    對數據進行智能分析和處理，數字顯示或傳遞，做到自檢自診斷自測試自修復自適應自校準自學習，是用數字技術取代模擬儀表的新型儀器。
  19. Bult - in self - test is considered to be the most hopeful technology to solve the great cost and difficulty of manufacturing test because of the increasing of the circuit density

    內建自測試（ buit - in - self - test ， bist ）技術被認為是解決由於電路集成度越來越大所造成的測試費用巨大和測試訪問困難等問題的最有希望的技術。
  20. This will be federal tyres first foray into circuit racing in this country. i have tested the 595 rs r spec tyres and they definitely compare well the well established motorsport brands. our unique championship format coupled with the closeness of one make racing in thoroughbred sports cars together with the support of federal tyres and lotus cars australia will see our series go from strength to strength "

    X challenge賽事主辦人，同時具有車手身分的azim sahu - khan表示：這是飛達輪胎第一次投入澳洲賽車活動，我親自測試過595 rs r輪胎，比起其他品牌性能跑胎它毫不遜色，蓮花跑車搭配飛達輪胎勢必會讓今年的賽事精采萬分。
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