行為級 的英文怎麼說

中文拼音 [hángwéijí]
行為級 英文
behavioral scale
  • 行 : 行Ⅰ名詞1 （行列） line; row 2 （排行） seniority among brothers and sisters:你行幾? 我行三。where...
  • 級 : Ⅰ名詞1 （等級） level; rank; grade 2 （年級） any of the yearly divisions of a school course; gra...
  • 行為 : action; behaviour; conduct; deed
  1. Effects of body weight on dominance hierarchy and agonistic behaviors in male greater long - tailed hamsters tscheskia triton

    雄性大倉鼠體重對其斗毆行為及社會等級的作用
  2. The capacity of the civil behavior baa the three classifications and the two classifications

    摘要民事行為能力的立法體例有三級制、二級制之別。
  3. Finally, delivery of cargo without original bills of lading promote the development of shipping in a way in practice, it has reasonability in existence. chapter three is writer ' s study for 10 leading cases of chinese maritime court and court of cassation concerning delivery of cargo without original bills of lading, writer conclude as follows : chinese courts are inclined to regard it as breach of contract but not in tort in judicial practice ; chinese courts allow the plaintiff to choose to sue in tort or of breach ; chinese courts have abandoned the viewpoint of " who holder the bills who must have the right to sue " or " who holder the bills who must win the case " ; and in many cases concerning delivery of cargo without original bills of lading, the court ignored plaintiff ' s actions against the carrier, it proved that carrier can escape reasonability of delivery of cargo without original bills of lading in some cases

    第三章論述我國海事法院及其上級法院就無單放貨案件審理的司法審判實踐研究，通過對十個法院判例的分析、歸納，筆者認為，在司法實踐中，法院越來越傾向于將無單放貨糾紛視為運輸合同糾紛處理，而不認定為侵權行為糾紛；法院允許原告起訴時以侵權起訴或違約起訴作出選擇；法院對提單持有人的訴權認定，已經不採用「誰持有提單誰就有訴權」與「誰持有提單就能保證勝訴」的觀點；有諸多的無單放貨的訴訟案例以被法院駁回起訴為結局，證明了無單放貨在特定情況下的合理性以及承運人有避免承擔責任的可能性。
  4. Audit, censorial, finance, prices and department of town enterprise administration are in the xiang jifei standard that receives a town enterprise to put forward collects fees, after the impeach of the unit that apportion perhaps fines and individual, ought to undertake investigate and obtaining evidence, belong to to the circumstance solid, concerned branch and upper body ought to be instructed suspend its action, to direct responsibility personnel, concerned branch is ok according to clue weight, give corresponding punishment

    審計、監察、財政、物價和鄉鎮企業行政治理部門在接到鄉鎮企業提出的向其非法收費、攤派或者罰款的單位和個人的檢舉后，應當進行調查和取證，對于情況屬實的，有關部門和上級機關應當責令停止其行為，對直接責任人員，有關部門可以根據情節輕重，給予相應的處罰。
  5. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  6. After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper

    此外，本文還對處理器的浮點運算單元設計做了初步的研究，以ansi ieee - 754浮點數二進制標準為參考，借鑒了經典的定點加法器和乘法器的設計，嘗試性的給出了浮點加法單元和乘法單元的實現模型和行為級上的硬體描述，並對其進行模擬和驗證。
  7. A multi - layer charge - pump phase - locked loop behavioral model

    一種電荷泵鎖相環的多層行為級模型
  8. A testbench program is edited to simulate the behavior of the fifo. after the software simulation is accomplished, a real hardware circuit is designed to multiplex two data channels ( 1553b data channel and 1394 data channel ) according to ccsds standard. during the experiment and hardware debugging, the output logic of the fpga is checked up

    設計中，用vhdl語言對高速復接器進行行為級建模，為了驗證這個模型，首先使用軟體進行模擬，通過編寫testbench程序模擬fifo的動作特點，對程序輸入信號進行模擬，在軟體邏輯模擬取得預期結果后，繼續設計硬體電路，設計出的實際電路實現了將來自兩個不同速率的信源數據（ 1394總線數據和1553b總線數據）復接成一路符合ccsds協議的位流業務數據。
  9. Ii. behavior level design. taking pci - microwire ? interface module as an example, the thesis details the design method of modules in the chip at behavior level

    行為級設計：以pci - microwirer ~ （ tm ）通訊介面模塊的設計為例，詳細論述了晶元中模塊的行為級設計方法。
  10. A novel synthesis method for behavioral design of sigma - delta modulator

    調制器行為級設計方法
  11. The thesis launches from task layer planning and behavior layer planning

    論文對多機器人系統的研究從任務級規劃和行為級規劃兩個層次進行展開。
  12. Based on the large - scale multi - robot foraging mission, task cooperation and action coordination problems are discussed under the distributed cooperation architecture

    摘要以大規模多移動機器人覓食任務為背景，探討了在分散式協作體系結構下系統任務級的協作與行為級的協調問題。
  13. In the paper, we focus on low power scheduling at the behavioral level, which partitions the behavior description into the time interval at multiple voltages and under multiple constraints

    本文主要研究行為級的低功耗調度技術，是在多約束條件下，把工作在不同電壓下的操作分成具體的時間段進行執行的過程。
  14. The test bench program is a virtual pci system, which comprise the microblaze model established from xilinx edk and also the pci / pci - x model from synopsys company. function level or gate level simulation can be done on this test bench

    測試平臺中，利用xilinxedk生成的microbalze處理器模擬模型，以及synopsyspci / pci - xflexmodels模型組建了一個虛擬的pci系統，可進行門級和行為級的模擬。
  15. There is the main work and achievements as follows : based the study of old rtl level ip core ’ s modeling methods, we study deeply transaction level ip core ’ s modeling methods, put forward transaction level ip core modeling method faced soc

    完成的主要工作和主要研究成果如下:在研究已有rtl級ip核建模方法的基礎上，深入研究行為級ip核的建模方法，提出了一種面向soc的事務級ip核建模方法。
  16. Fourth chapter introduces gpon model and data source builded by systemc language, verifies function of this model, collects correlation parameters ; 5. fifth chapter summarizes the model, and offers the improvement method. the creationary work of this paper is

    最後根據該系統結構在visualc + + 6 . 0這個平臺上使用systemc語言進行行為級系統建模，並設計了相關的業務源作為輸入，實現並驗證了該gpon系統模型的基本功能。
  17. In this part, the function definition and structure partition are finished, then every part is depicted with verilog hdl. by verilog - xl tools, behavior simulation is achieved. the chip logic function that is encrypting 1024bit data is realized

    在設計的過程中，完成了整體的結構劃分，使用veriloghdl硬體描述語言進行了電路的rtl級描述，並利用了candence公司的verilog - xl完成了軟體平臺上的行為級模擬，實現了1024位數據的加密解密的邏輯功能。
  18. Due to the development of 1c technology, now a complex system can be integrated in a chip called system on chip ( soc ). the design of soc needs new design methodologys and modeling tools. systemc is an open c + + modeling platform promoted by the open systemc initiative, which consists of a well defined set of c + + classes and a simulation kernel, supporting design abstractions at the register - transfer, behavioral, and system levels. the advantages of systemc include the ability for hardware - software co - design, the ability to exchange ip easily and efficiently, and the ability to reuse test benches across different levels of modeling abstraction

    系統級晶元的設計需要新的設計方法和建模工具。 systemc是osci （ opensystemcinitiative ）組織制定和維護的一種開放源碼的c + +建模平臺，它由一個定義良好的c + +類庫及模擬內核組成，支持對系統進行寄存器傳輸級，行為級和系統級的描述。 systemc的優點包括對軟硬體聯合設計的支持，更高效和方便的進行ip交換，以及在不同的抽象模型間復用測試基準的能力。
  19. After plotting out function modules, this paper uses verilog hdl to contrive each module in behavior and set up test bench to simulate the protocol processor by model tech ’ s simulation software modelsim, then synthesize the behavior codes by synplicity ’ s synthesize tool synplify pro

    並建立測試平臺，通過modeltech公司的模擬軟體modelsim對協議處理器進行模擬。隨后，使用synplicity公司的綜合工具synplifypro對行為級的代碼進行綜合，選用的器件是xilinx公司的spartan - exc2s300 。
  20. The principles of sigma - delta modulator have been discussed firstly and the influences of structure and parameters on resolution have been analyzed. then on the base of theories, the simulink toolbox of matlab has been used to make behavior simulation and fft analyse of two main structures : 2 - 1 - 1 and 2 - 2. the related parameters of modulator such as : psd, sndr and enob have been gotten by simulink toolbox on the conditions of different oversampling rates. from the analyses above, topology of modulator has been chosen

    調制器的原理進行了介紹，分析了各種結構及參數對調制器精度的影響;其次，在理論指導的基礎上，利用matlab的simulink工具包對調制器兩種主要級聯結構: 2 - 1 - 1和2 - 2結構進行了行為級模擬和fft分析，得出了在不同過采樣率條件下，兩種結構調制器的功率譜密度、信噪失真比以及有效位數，通過比較確定了調制器的拓撲結構。
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