襯底片 的英文怎麼說

中文拼音 [chèndepiān]
襯底片 英文
substrate slice
  • : Ⅰ動詞1 (在裏面托上一層) line; place sth underneath 2 (陪襯; 襯托) set off Ⅱ名詞(襯在裏面的附...
  • : 底助詞(用在定語后, 表示定語和中心詞之間是領屬關系, 現在多寫作「的」)
  • : 片構詞成分。
  1. As he struck the wall, pieces of stucco similar to that used in the ground work of arabesques broke off, and fell to the ground in flakes, exposing a large white stone

    洞壁上掉下來一塊象阿拉伯式雕刻用的那種塗料,跌在地上碎成了,露出了一塊白色的大石塊來。
  2. The material is applied as a thin film to glass substrates such as optical fibers and glass slides

    該材料作為一種薄膜用於玻璃,如光纖或載玻
  3. By using the various substrate such as glass, stainless steel, ito < wp = 6 > film and ceremic wafer, we discover that we can deposite the high quality cnx thin film with the high cohesion, high hardness and low friction coefficient on the ceremic substrate

    我們發現在載玻,不銹鋼及ito膜玻璃上沉積的cnx薄膜,由於和膜料的應力差較大,都有薄膜破裂、剝落現象。並且有成膜不均勻現象硬度也較低。
  4. Monolithic optoelectronic integrated circuits ( oeics ) integrate optoelectronic components and electronic components onto one chip. it has the advantages of high speed, small size and cost - effective. the fabrication of monolithic oeics is confronted with the incompatibility problem between optoelectronic components and electronic components

    光電集成器件( oeics )是利用光電子技術和微電子技術將光電子器件和微電子器件集成到同一而形成的新型器件,具有功能強、體積小、成本低等突出優點。
  5. And then, zno thin films were synthesize on quartz and silicon substrates by sol - gel dip - coating and spin - coating. the properties of the films and the effects of growth parameters on the quality of zno films were studied using x - ray diffraction, optical absorption, photoluminescence techniques, etc. to modify the energy gap of the zno, mg2 + was added in the sol - gel solution, and mgxzn1 - xo films were prepared by the same method as that for zno films

    利用溶膠凝膠法成功地在石英玻璃和單晶矽上制備出了c軸擇優取向的zno薄膜,並利用x射線衍射儀、紫外-可見光光譜儀、熒光光譜儀等對zno薄膜的結構和性能進行了測試、分析,並研究了熱處理參數等條件對zno薄膜性能的影響。
  6. A ) si thin film with sub - micro thickness was epitaxial grown on heavy - doped si substrate by ultra high vacuum chemical vapor deposition ( uhv - cvd )

    A )利用超高真空化學氣相沉積( uhv - cvd )技術在重摻si上生長高晶體質量的亞微米級薄硅外延
  7. The simulation shows that, under inductor self - resonant frequency ( serf ), substrate loss is mainly caused by eddy current loss

    模擬驗證表明,在自諧振頻率( self - resonantfrequency )范圍內上集成電感損耗主要是渦流損耗。
  8. The n / n + and p / p + epitaxial structures, which become popular with the development of coms technology, because they can avoid the latch - up and a softerror of ulsi while they combined with the intrinsic gettering ( ig ) technique

    Coms工藝中普遍採用n / n ~ + 、 p / p ~ +的外延結構,這種以重摻雜矽的外延結構與內吸雜工藝相結合,是解決集成電路中的閂鎖效應和粒子引起的軟失效的有效途徑。
  9. The accelerometer which has simple fabricated process and high sensitivity and small parasitic capacitance and residual stress is hybrid integrated with the interface circuit using ic nude chip. so the density of the package is increased, and the noise of the sensing system is decreased. these found the base of capacitive accelerometer module using the mcm method

    該傳感器製作工藝簡單,靈敏度高,支撐梁採用u型,減小了刻蝕后的殘余應力,用玻璃作為,減小了和硅可動質量塊間的寄生電容,且把傳感器晶元和用ic裸製作的介面電路集成在一起,提高了封裝密度,減小了傳感器系統的噪聲,為採用mcm技術製作電容式加速度傳感器模塊打下了基礎。
  10. ( 4 ) the study of the optical band gap of cnx film by uv - vis spectrophotometer. ( 5 ) by using the microhardness tester, we study the hardness of cnx film on the ceremic substrate by dc magnetron reactive sputtering with the feed ar and n2 flow rate, film thickness, substrate temperature and substrate bias

    ( 5 )用直流磁控反應濺射法,以陶瓷作為,對在ar和n2不同流量、不同膜厚、不同基溫度和對基施加不同偏壓下沉積的薄膜,用< wp = 4 >顯微硬度計研究測試了不同工藝參數下的相應硬度。
  11. In this paper, plasma - enhanced chemical vapor deposition ( pecvd ) technique was used to deposit the dielectric p - sio2 films and p - sion films on the silicon wafer under the conditions of low temperature and low pressure with teos organic sourse. this research was focused on the evaluation of film growth, hardness, stress, resistance and refractive index, by changing the experimental parameters including rf power, substrate temperature, chamber pressure, and the flow rates of teos, o2, n2. the results showed that the p - sio2 film was smooth, dense, and structurally amorphous

    實驗結果顯示,用pecvd法淀積的p - sio _ 2膜是一表面平坦且緻密的非晶質結構的薄膜,與矽之間有良好的附著性;在中心條件時生長速率可控制在2600a / min左右;在基板溫度410時有最大的硬度可達16gpa ;其應力為壓縮應力,可達- 75mpa ;薄膜的臨界荷重為46 . 5un 。
  12. The demand of the wafer ' s quality become higher too. the result of the final polishing determines the quality of silicon substrate for the final polishing is the last step in the polishing. in this paper, the mechanism and dynamics process of silicon polishing are systematically analyzed

    隨著集成電路向著甚大規模集成電路( ulsi )日新月異的發展,作為材料的硅單晶的尺寸越來越大,特徵尺寸也不斷減小,對硅拋光的拋光質量的要求也越來越高。
  13. The realization of the algorithm drives the research of micro - electron structure. 2. the la2o3 thin film is prepared by rf technology, the film is analyzed by arxps, the thickness is calculated by quantitative analysis software, the thickness of sio2 thin film between la2o3 and si is 0. 6nm

    利用射頻濺射鍍膜技術在si上制備了la _ 2o _ 3膜,通過變角xps分析和多層結構的定量計算,測得la _ 2o _ 3與si之間的sio _ 2層厚度為0 . 6nm 。
  14. Microelectronic circuits in which the passive components and their metallic interconnections are formed directly on an insulating substrate and the active semiconductor devices ( usually in wafer form ) are added subsequently

    一種微電子電路器件,其中的無源元件及內部金屬連線直接在絕緣上形成,然後再加上有源半導體器件(通常以大圓形式給出) 。
  15. Especially, mesfet devices fabricated on lec si - gaas substrate have been adopted into very large - scale integration ( vlsi ) and monolithic microwave integrated circuit ( mmic ) extensively. therefore, it is necessary to study the influence of defects in substrate material of lec si - gaas on performance of mesfet to meet the need of design and fabrication of gaas ic

    以液封直拉半絕緣gaas為的金屬半導體場效應晶體管( mesfet )器件是超大規模集成電路和單微波集成電路廣泛採用的器件結構,因此研究lec法生長si - gaas ( lecsi - gaas )材料特性對mesfet器件性能的影響,對gaas集成電路和相關器件的設計及製造是非常必要的。
  16. The choices of components in the final polishing slurry, specially alkali, surfactant and chelating agent have been discussed

    精拋作為拋光過程中的最後一步,精拋的結果決定了硅拋光質量的好壞。
  17. The experiment results showed we had got well nanowires on si and sapphire substrate and the au and ag act catalyst respectively, we got zno nanowires array on si and sapphire substrate using the ag as catalyst. 2. we measured the pl spectrum of zno nanowires samples excited by an ultraviolet fluorescence spectrophotometer in different wavelength

    實驗結果顯示分別採用金和銀為催化劑在硅和藍寶石上制備出結晶質量較好的納米線,其中在銀催化的硅基和藍寶石基上制備出排列整齊的納米線陣列。
  18. Slicing and lapping are two basic procedures in wafer substrate process and are introduced firstly in this thesis

    和研磨工序是硅器件襯底片制備中的兩道基本工序。本文首先介紹了這兩道工序。
  19. Heavily as - doped silicon substrates are adopted by many device manufactories because of higher as - doping density. therefore, quantitative determination of oxygen precipitation and induced - defects in heavily as - doped silicon is important to the realization of ig

    重摻砷硅襯底片正日益受到器件廠家的青睞,所以研究重摻砷硅單晶中的氧沉澱及誘生缺陷對實現重摻的內吸除有重大意義。
  20. With the development and application of the microwave communication system 、 precision guided technologies and electronic countermeasure etc, the research on dielectric materials such as circuit dielectric substrate 、 antenna unit dielectric substrate and radome are paid more and more attention

    隨著毫米波通信系統、精確制導、電子對抗等技術的發展和應用,對電路介質基、天線單元介質、天線罩等介質材料的研究越來越受到重視。
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