觸發器電路 的英文怎麼說

中文拼音 [chùfāqìdiànlù]
觸發器電路 英文
flip flop circuit
  • 觸 : Ⅰ動詞1 （接觸） touch; contact 2 （碰; 撞） strike; hit 3 （觸動） touch 4 （感動） move sb ; sti...
  • 發 : 名詞（頭發） hair
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 觸發 : detonate by contact; touch off; trigger; strike
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. At the same time the principles of triggering pulse to the three - phase thyristors is discussed, and a way using monostable multivibrator to produce the pulses has been given below. the hardware control system based on tms320f240 is designed, which includes sampling circuit, protective circuit, phase - compensated circuit and so on

    對三相晶閘管控制電抗器的觸發脈沖產生原理進行了分析，採用單穩態觸發器實現六相觸發同步；設計了以tms320f240為控制核心的硬體控制平臺，包括采樣電路、保護電路、六相觸發同步等外圍電路。
  2. Some correlative designs and experiments are finished before the microwave test experiment. the property of a finite long magnetic coil is studied and the coil magnetic field circuit is constructed for the experiment of microwave. a digital two - channel trigger device is designed and successfully applied in the experiment

    為了微波實驗的順利進行，我們設計並加工了磁場線圈，研製了控制磁場線圈迴路觸發和強流電子束加速器觸發同步的兩路數字同步觸發器，研製了測量電子束流的法拉第筒，並成功地將這些設備應用於微波實驗研究。
  3. The silicon controlled trigger and it s auxiliary circuit could regulate simultaneously the controlling coil current of four series - parallel connected powers, so the purpose of making four powers output in step with was achieved, and the process of increasing progressively current after lighting arc and weakening current after going out arc was realized

    利用可控硅觸發器及輔助電路可以同時調節串並聯在一起的四臺電源控制線圈的電流，達到四臺電源同步輸出的目的，並且實現了等離子弧噴塗引弧時電流遞增和熄弧時電流衰減的過程。
  4. According to the requirements of static compensator ( statcom ) to triggering pulse generator, an autonomous triggering system for statcom was developed based on complex programmable logic device ( cpld )

    針對靜止無功補償器（ statcom ）對觸發脈沖發生電路的要求，利用復雜可編程邏輯器件（ cpld ）開發了一種自治型statcom觸發系統。
  5. The results from the calculation and simulation indicate that this thyristor trigger has had a wide triggering angle, high controlling precision and better symmetry output pulses, whereby obviously improving the dynamic performances of the digital - type trigger and overcoming some defects in traditional triggering electric circuit in such a way as to satisfy the requirements by the diqital controlling equipment with high power and reliability

    計算和模擬結果表明，該觸發器的觸發角范圍大、控制精度高、輸出脈沖對稱度好，明顯地提高了數字式觸發器的動態性能，並克服了傳統觸發電路的一些缺陷，可滿足大功率和高可靠性數字控制設備的要求。
  6. The chip can be widely used in mp3 player, pda, digital camera, cells phone and portable products etc. this thesis first introduces the basic theory of switching power supply. the operating theory of this circuit has been demonstrated. the operating principle and simulation analysis about band gap reference, self - biased current source, one shot circuit, hysteresis comparator, and current - limit circuit have been particularly expounded in this thesis

    本文首先闡述了開關電源的工作原理，詳細介紹了本電路的整體工作原理，最後重點介紹了自偏置電流源電路、基準源電路、單穩態觸發器電路、峰值電流限制及低電池電壓遲滯比較器的工作原理，並利用eda工具larker ? ams 、 hspice對電路進行了完整的設計和模擬模擬，給出了合理的電路數據，各子模塊電路的電特性參數均達到或優于設計所需指標。
  7. Flip - flop is the core of sequential circuits, this dissertation designed a synchronous set - reset edge - trigged jk flip - flop based on rt quantum devices, the jk flip - flop has strong function and high speed, and also riches the types of flip - flops in quantum circuits

    所設計的jk觸發器功能強，且與傳統的觸發器相比，基於rt量子器件的邊沿型jk觸發器具有量子器件的功耗低、速度快、電路簡單等特點。本文設計的jk觸發器豐富了量子電路中觸發器的種類，使得量子時序電路的設計更為靈活。
  8. Flip - flops are the basic units in digital circuit

    觸發器是數字電路中的重要結構單元。
  9. The whole pwm circuit contains two subcircuit, the front - end is pwm module that make up of the counter that based on nine mosfet true - single - phase - clock d flip - flop ; the back - end is demodulated module, which is consist of a three order chebyshev low - pass filter used trans - conductor capacitor. all the subcircuits are simulated. at last, an approving simulated result of the whole circuit is given too

    在調制部分，利用九管單相時鐘d觸發器構成計數器，並由此組成了脈沖寬度調制電路，同時給出了在典型溫度下的模擬結果;在解調部分，介紹了低通濾波器從無源到有源的設計方法，設計了三階切比雪夫低通跨導電容濾波器，同樣給出了相應的模擬結果;最後，作為將脈沖寬度調制電路和濾波器作為整體電路，以脈沖調頻波為輸入進行了模擬，取得了令人滿意的結果。
  10. The limitations of schmitt toggle circuit, composed of 555 timing circuit, is discussed, a improved schmitt toggle circuit is given, and proved by using theory and experiment

    摘要論述了常用555定時器構成的施密特觸發器電路的局限性，給出了施密特觸發器的改進電路，並用理論和實驗加以證明和驗證。
  11. According to elaborate analysis of clock logic in general purpose processor, we apply multi - bit clock gated flip - flops design to reduce the power of registers and clock trees concurrently, so the power of the clock network in processors can be drastically reduced. 3. a low power issue queue architecture is proposed

    一方面利用帶門控使能的觸發器電路降低時鐘節點的平均翻轉，另一方面通過多比特觸發器的採用進一步降低了時鐘樹規模，從而在不增加asic物理設計復雜度的情況下大大降低了龍芯處理器的時鐘網路功耗; 3 .提出了亂序多發射隊列的低功耗結構。
  12. In the meantime, the all sub - circuits are also designed and emulated carefully including inverter, rs type flip - flop, voltage reference circuit, error amplifier, voltage comparator, sawtooth - wave generator, pwm comparator, soft activation circuit and so on. as a result, all of the sub - circuits answer the requirements. this chip has taped out with the 0. 5um mix - signal process of csmc

    本文利用cadenceeda集成電路設計工具、 spectres模擬工具，對集成電路內的各個模塊包括反相器、基本rs觸發器、基準電壓電路、誤差放大電路、電壓比較電路、鋸齒波振蕩發生電路、 pwm比較電路、軟啟動電路、驅動電路等進行了具體的設計和模擬，且達到了預先設定的指標。
  13. In meantime, the all sub - circuits are also designed and emulated carefully including error amplifier, voltage reference circuit, voltage comparator, rs type flip - flop, soft - start circuit, sawtooth - wave generator, pwm comparator, current added circuit and so on

    其次對控制器內部晶元的各個模塊誤差放大電器、自舉電流電路、電壓基準源、電流求和電路、 rs觸發器和驅動電路等模塊進行了具體的設計和模擬的邏輯功能做了解釋。
  14. The whole circuit consists of a multiplier, an error amplifier, a comparator, a rs flip - flop, an and gate, and an inverter, etc. the electronic circuit simulator cadence is utilized to practice the detailed functional simulation of the general circuit and the subsystem circuits

    整個電路由模擬乘法器、誤差放大器、比較器、 rs觸發器、與門和倒相器等基本單元電路組成，採用工作站上的大型ic設計軟體cadence進行模擬。
  15. From the concept of triditional master - slave flip - flop, we propose a simplified positive edge - triggered flip - flop and prove the traditional positive edge - triggered flip - flop is the master - slave flip - flop designed based on basic flip - flop with single - rail input

    並且從傳統主從結構觸發器出發，提出了簡化結構的維持阻塞型觸發器設計。針對數字電路中大量存在的冗餘現象，本文討論了冗餘抑制原理以及相應的冗餘抑制技術。
  16. Circuit design is the basis of design of demultiplexer. speed, power and chip area are the main factors that should be considered in circuit design. every circuit structure has its merits and drawbacks, e. g. cmos logic family has a slower speed, but lower power, smaller area, scfl ( source couple fet logic ) family has a higher speed, but higher power, larger area. we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors. flip - flop is the fundamental element of demultiplexer, setup time and hold up time are key factors, which influence the speed of circuit, thus the design aim is how to reduce them. in this thesis we place emphasis on the design of scfl latches

    速度、功耗、面積是電路設計要考慮的主要因素，不同的電路形式具有不同的優缺點，如cmos互補邏輯電路功耗低，面積小，速度相對較慢； scfl （源極耦合fet邏輯）電路速度高，功耗和面積較大。所以要針對具體設計需要選用適當的電路形式或其組合結構，以滿足設計要求。觸發器是分接器的基本組成單元，建立時間和保持時間是影響電路速度的關鍵，所以減小建立時間和保持時間是觸發器設計的主要目標，本文著重介紹了scfl鎖存器的設計和優化方法。
  17. Semiconductor integrated circuits. detail specification of type je 10531 ecl dual d master - slave flip - flop

    半導體集成電路. je10531型ecl雙d主從觸發器詳細規范
  18. As emphasis, we propose a new backward width - flrst search circuit partitioning method with flip - flop as core for synchronous sequential circuits. and then based on it, we develop a new circuit parallel tg algorithm

    最後重點對電路并行方法進行了研究，提出了一種新的以觸發器為核且消除大功能塊之間反饋的寬度優先反向搜索同步時序電路劃分方法。
  19. Semiconductor integrated cicuits. detail specification for type jt54f74 fttl dual d positive edge - triggered flip - flops

    半導體集成電路. jt54f74型fttl雙上升沿d觸發器詳細規范
  20. Detail specification for electronic component. semiconductor integrated circuit. type ch2005 dual j - k negative - edge triggered flip - flop

    電子元器件詳細規范.半導體集成電路ch2005型雙下降沿j - k觸發器
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