超集成度 的英文怎麼說

中文拼音 [chāojíchéngdù]
超集成度 英文
overcomplexity
  • 超 : Ⅰ動詞1 （越過; 高出） exceed; surpass; overtake 2 （在某個范圍以外; 不受限制） transcend; go beyo...
  • 集 : gatherassemblecollect
  • 成 : Ⅰ動詞1 （完成; 成功） accomplish; succeed 2 （成為; 變為） become; turn into 3 （成全） help comp...
  • 度 : 度動詞[書面語] （推測; 估計） surmise; estimate
  • 集成 : integration集成晶體管 integrated transistor; 集成元件 integrated component
  1. Strained - soi mosfet, which appears recently, takes both the advantages of soi ( silicon on insulator ) and sige ( silicon germanium ). it has shown advantages over bulk sample in enhanced carriers mobility, as well as higher transconductance, stronger drive capability and reduced parasitic capacitances. these properties make it a promising candidate for improving the performance of microelectronics devices

    Strained - soimosfet是最近幾年才出現的新型器件，它將soi材料和sige材料結合在一起，與傳統體硅器件相比，表現出載流子遷移率高、電流驅動能力強、跨導大、寄生效應小等優勢，特別適用於高性能、高速度、低功耗超大規模集成電路。
  2. With the advance of semiconductor manufacturing, circuits with increasingly higher speed are being integrated at an increasingly higher density, which makes analysis and verification of power grid integrity more important. power grid integrity includes four issues, namely, ir drop analysis, ground bounce analysis, ldi / dt from the pin inductance and em analysis

    隨著超大規模集成電路集成度和工作頻率的不斷提高，電源網格完整性分析變得越來越重要，一般有四個關鍵問題： ir電壓降分析、接地點電勢上升（ groundbounce ）分析、來自引腳電感的ldi / dt分析和電子遷移率em分析。
  3. Since the wireless transmission system makes the best use of msp430 family chip, which is effective, high speed and precision, it is specially designed for the turbo _ generator monitoring which is handy or powered by batteries, or the room is very limited

    本文利用msp430超低功耗和高集成度的優點，專門針對電池供電和使用空間受限的汽輪機組監視保護儀表，設計、實現了傳感信號的無線數字傳輸系統。
  4. Based on analyzing the theoretical model of ultrasonic attenuation, the formula was integrated into the ultrasonic attenuation model, and the relation of ultrasonic attenuation to pulp density and particle size was derived

    在分析超聲衰減基本理論模型的基礎上，將不同粒徑的篩下累積含量集成到超聲波衰減模型中，推導出超聲波衰減與礦漿濃度、粒度之間的關系模型。
  5. Along with silicon ulsi technology has seen an exponential improvement in virtually any figure of merit, as described by moore ’ s law ; the miniaturization of circuit elements down to the nanometer scale has resulted in structures which exhibt novel physical effects due to the emerging quantum mechanical nature of the electrons, the new devices take advantage of quantum mechanical phenomena that emerge on the nanometer scale, including the discreteness of electrons. laws of quantum mechanics and the limitations of fabrication may soon prevent further reduction in the size of today ’ s conventional field effect transistors ( fet ’ s )

    隨著超大規模集成電路的的發展，半導體硅技術非常好地遵循moore定理發展，電子器件的特徵尺寸越來越小;數字集成電路的晶元的集成度越來越高，電子器件由微米級進入納米級，量子效應對器件工作的影響變的越來越重要，尺寸小於10nm將出現一些如庫侖阻塞等新特性。量子效應將抑制傳統晶體管fet繼續按照以前的規律繼續減小。在這種情況下，宏觀的器件理論將被替代，可能需要採用新概念的晶體管結構。
  6. A larger market leads to mass production, economies of scale in manufacturing, vlsi implementations, and other benefits that decrease price and further increase acceptance

    一個更大的市場帶來大規模的生產、製造業的規模經濟、超大規模集成電路實現等等一系列可以降低成本、曾加產品接受度的好處。
  7. Integrated circuits require less power and lower voltages than the equivalent macroscopic circuits, consequently they operate at lower temperatures, and individual components may be closed together without exceeding the operating temperature limit

    參考譯文：集成電路比等效的分離元件電路功率小，工作電壓低，因而可以在較低的溫度下工作，電路中包含的單個元件可以緊靠在一起而不超過工作溫度極限。
  8. When the silicon technology comes to deep sub - micron level, the interconnect delay exceeds the gate delay ; and because of the increase of 1c work frequency, the allowable errors become smaller, and the influence of the transmission delay gets bigger, which increase the difficulty of the circuit design

    在深亞微米製造技術中，晶元互連線延遲超過門延遲，而且隨著集成電路工作頻率的提高，允許的時序容差變小，傳輸延遲的影響加大，設計工作難度增加。
  9. Portable dso ( digital storage oscilloscope ) is the extension and development of the conventional oscilloscope. they are more integrative, more powerful and less power consumption, as well as their portability meets the demand of the electronic instrument

    便攜式數字存儲示波表（ dso : digitalstorageoscilloscope ）是傳統電子測量儀器模擬示波器功能的延伸和發展，它充分利用了當今集成電路所具有的高集成度、超低功耗等優點，而且也滿足了人們對電子儀器設備的便攜性需求。
  10. It is widely used in many circuits, such as high precise comparators, a / d and d / a converters, drams, flash memory circuits, and other analog or mixed circuits. therefore, it is significant to develop a voltage reference circuitry that is compatible with digital cmos technology and can be integrated into a system on a chip ( soc )

    基準電壓源（ voltagereference ）是超大規模集成電路和系統的重要組成部分，應用於高精度比較器、 a d和d a轉換器、隨機動態存取存儲器、閃存電路等多種電路和電路單元，亦為系統集成晶元（ soc ， systemonachip ）所廣泛採用。
  11. Under the super high yield integrated technology, the leaf area of the first and second leave from the top was bigger, their internodes were longer, the primary two internodes were shorter

    從株型結構看，水稻超高產集成技術處理倒1葉和倒2葉葉片葉面積大，上部節間長度長，基部二節節間短。
  12. The analysis of microstructure of samples showed that the grain of tio2 were very small under 700, the distance of grain became small with temperature increasing, the rate and size of pore was decreasing. the relative density of sample at 900 was 97 % and the grain size of sintered body was about 200nm. when the temperature exceeded 1100, the grain size of body grew up several times ( > 2 m )

    Tio _ 2燒結體sem顯微形貌分析表明：低溫（ 700 ）時坯體內顆粒無明顯長大，燒結體緻密度不高（ 80 ）晶粒間距隨溫度升高而變小，氣孔率也隨之降低，氣孔尺寸變小；當溫度超過900時，晶粒間連接緊密，燒結體內出現大量絮狀物質，緻密度大幅度提高，達97以上，小氣孔已聚集成大孔洞且分佈均勻，晶粒長大不明顯（ 200nm左右） ；當溫度超過1100時，燒結體緻密度有所提高，但晶粒尺寸出現異常長大，長大了十幾倍（達2 m以上） 。
  13. Bode fine building material co., ltd. is a joint venture with an area of more than 700, 000 sqm and over 1, 500 employees, specializing in design, exploration and production of high - tech building material for environment protection

    產品具有釉面超平整度、不透水與耐龜裂等特點，是目前行業內一次燒釉面磚的一個集大成者，設計風格高雅、時尚。
  14. Coplanar waveguides ( cpw ' s ) offer several advantages over conventional microstrips, these include the simplification of the circuit fabrication process, ease of parallel and series insertion of both active and passive components ( without the need for via holes ), and high circuit density. therefore cpw ' s are widely used in microwave and millimeter - wave integrated circuits, optical and high temperature superconductor microwave devices

    與常規的微帶傳輸線相比，共面波導具有容易製作，容易實現無源、有源器件在微波電路中的串聯和並聯（不需要在基片上穿孔） ，容易提高電路密度等優點，因此共面波導被廣泛應用於微波、毫米波、光學和高溫超導等集成電路中。
  15. With the great progresses and series of break - through in vlsi technologies, integrated dsp comes. integrated dsp has lots of advantages, such as low power cost, compactness, higher working speed and so on. dsp are very suitable in speech signal processing

    隨著超大規模集成電路技術上取得的突破進展，高度集成化的dsp數字信號處理器具有體積小、功耗低和運算速度快等諸多優點，因此非常適用於語音信號的壓縮處理。
  16. Quantum devices have very outstanding predominance, their high - speed high - frequency high - integrated and low - power characteristic, make them the very important devices in the use of vlsi in the future : this dissertation designed the binary nand gate and nor gate based on rt quantum devices

    而量子器件在這方面有著非常明顯的優勢，它以其固有的超高速、超高頻、超高集成度、高效低功耗等特點，在未來vlsi方面有著及其重要的應用前景，將成為21世紀信息技術的支柱。
  17. As the density of very large - scale integration ( vlsi ) chips increases, the probability of introducing defects on the chips during the fabrication process also increase

    隨著超大規模集成電路晶元生產技術的發展，單片晶元的集成度越來越高。要想一次生產出沒有任何缺陷的晶元已不太可能。
  18. Dotfuscator professional edition provides superior protection to foil decompilation, advanced size reduction to conserve memory and improve load times, deep visual studio. net integration for seamless configuration, incremental obfuscation to release patches, watermarking to uniquely tag assemblies, and phone and email technical support

    Dotfuscator professional edition提供的功能包括：防止反編譯的超強保護，節省內存並減少加載時間的高級減小大小功能，用於進行無縫配置的深度visual studio . net集成，用於發布補丁的增量模糊處理，用於唯一標記程序集的水印處理功能以及電話和電子郵件技術支持。
  19. With the development of very large scale integrated circuit, circuit scale is more and more large, complexity is more and more serious, which has become a huge challenge to electronic design automation

    隨著超大規模集成電路工藝的發展，電路規模越來越大，電路設計的復雜度越來越大，這對于電子設計自動化提出了嚴峻的挑戰。
  20. With the sharp development of lsi and vlsi, the integration of chip gets denser and denser. but the extra ports for testing is limited and test is more difficult than before. we even must spend more time and money on chip testing rather than chip design

    大規模集成和超大規模集成電路迅速發展，使晶元的集成度越來越高，而供外部測試的引腳卻很少，測試問題日趨困難，甚至使晶元測試比晶元本身的設計和生產要付出更高的代價。
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