輸入寄存器 的英文怎麼說

中文拼音 [shūrùjìcúnqì]
輸入寄存器 英文
i ut register
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 入 : Ⅰ動詞1 （進來或進去） enter 2 （參加） join; be admitted into; become a member of 3 （合乎） conf...
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 輸入 : 1 （從外部送到內部） import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. In an mos dynamic shift register the above problem is solved by keeping data in continuous motion.

    MOS動態移位寄存器的上述問題是通過使輸入數據連續不斷地循環來解決的。
  2. Bring the first operand to the date register.

    將第一個操作數輸入數據寄存器。
  3. Applying two perpendicular polarized light states and a no - light state to express information, this new theoretical system covers : a ) whole architecture constructed from light processing, light transmission, electric control and photoelectric input and output ; b ) various computing units mainly consist of liquid crystal element and polarimeter ; c ) light bus mainly consists of interlinkage optic valves ; d ) ternary memory formed from semiconductor memory ; e ) register formed from optic fiber ring ; and i ) huge - numeral management based on the new concept of calculating path and calculating channel

    這個理論包括：光處理、光傳送、電控制、綜合輸入輸出的總體結構；以液晶元件和偏振器為主的各類運算器結構；以互連光閥為主的光空間總線；以半導體存儲器為主的三值數據存儲器結構；以光纖環為主的寄存器結構；以算位、算道新概念為基礎的巨位數管理方案等。
  4. The shift register is a device in which information may enter sequentially or in parallel.

    移位寄存器是一種能以串列和并行方式輸入信息的裝置。
  5. In this paper, we discuss a kind of filter generator whose filter functions have less input bits than the degree of the linear feedback shift register ( lfsr ). by analyzing the structure of the filter generator and its equivalent system, we give out a conditional search algorithm ( csa ) to attack this kind of filter generators

    針對濾波函數f （ x ）的輸入比特數m少於線性反饋移位寄存器級數n的濾波生成器，本文通過分析其等價的組合生成器的結構，以及不同節拍上驅動序列的各個符號之間的制約關系，給出了廣義解序列的概念，並提出了類似遍歷二叉樹的條件搜索演算法csa ，用於攻擊該類特殊的濾波序列。
  6. This section addresses the timing relationships between transitions of one or more input signals that are necessary to ensure device functionality and applies only to sequential - logic devices ( e. g., flip - flops, latches, and registers )

    本節為一個或更多輸入信號之間的時序關系提供尋址，這些輸入信號是使器件發揮作用的必須信號，並且只應用於順序邏輯器件（比如觸發器、鎖存寄存器和寄存器） 。
  7. The configure file is downloaded into the fpga chip according to the fpga design fl ow. also a test system is set up, and the work status of the system is controlled by single chip to download the data of initial registers and control registesr. and the logical analyzer is used to sampling the output signals

    使用xillinx的fpgaxc2550pq208 ，經過fpga的實現流程，把配置文件配置到xczs5opqzos ，搭建了一個驗證系統，通過單片機來對各控制寄存器寫入控制字來控制系統的工作狀態，用邏輯分析儀採集輸出的信號。
  8. Which is a single temporary register that can be read into subsequent stages as an input argument

    ，後者是單個的臨時寄存器，可作為輸入參數讀入到后續的貼圖層。
  9. The other alternative is to modify the instruction pointer register using the

    命令修改指令指針寄存器，然後只要輸入
  10. Set the last register with counted value

    最後一個寄存器值存放計算好的輸入值。
  11. Youll next be prompted for the installed location of the apache server and the root directory used to locate the jars necessary for the development projects classpath

    然後將提示輸入apache服務器的安裝位置以及用來定位開發項目的類路徑所必需的轉移地址寄存器的根目錄。
  12. Information is transmitted to and from registers via buses.

    信息是通過總線輸入寄存器或由寄存器輸出的。
  13. Normally, you can display register contents just by entering the register name

    通常，只需輸入寄存器名便可以顯示寄存器的內容。
  14. Analyzing every part ’ s function and characteristic, i improve overflow control unit ’ s design technique to suit fpga design and traditional register exchange survivor managing algorithm. the system use input clock as system clock and use parallel structure in system to provide flexible speed

    採用適合fpga特點的溢出控制設計方法;改進傳統的寄存器交換法re （ registerexchange ）的倖存路徑管理設計方法;全系統採用輸入數據的同步時鐘作為系統時鐘，系統內部採用全并行的方式，以提供靈活的速度。
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